Change in coreboot[master]: nb/x4x/raminit: Decode ddr3 dimms

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

https://review.coreboot.org/19869

to look at the new patch set (#2).

Change subject: nb/x4x/raminit: Decode ddr3 dimms
......................................................................

nb/x4x/raminit: Decode ddr3 dimms

The raw_spd array needs to be increased since the ddr3 variant of
spd_decode assumes an array of that size.

Change-Id: I8dba19ca1e6e6b0a03b56c8de9633f9c1a2eb7d7
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/x4x/Makefile.inc
M src/northbridge/intel/x4x/raminit.c
M src/northbridge/intel/x4x/spd_ddr2_decode.c
A src/northbridge/intel/x4x/spd_ddr3_decode.c
M src/northbridge/intel/x4x/x4x.h
5 files changed, 196 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/19869/2