Change in coreboot[master]: soc/amd/stoneyridge: Add PC speaker control

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/29627

Change subject: soc/amd/stoneyridge: Add PC speaker control
......................................................................

soc/amd/stoneyridge: Add PC speaker control

Chromebook do not implement PC AT speaker, they use sound cards (normally
integrated to the FCH). Therefore, declaring PC AT speaker in ACPI is a
waste of memory. However, if some user needs it, it can't be simply removed.
Add a config parameter, disabled by default, to control the inclusion of
PC AT speaker into the ACPI code.

BUG=b:117818432
TEST=Used IASL do disassemble original DSDT and saved. Added code, compiled
grunt, disassembled new DSDT, compared to original. The PC AT speaker code
was missing. Then flashed the new image and boot grunt.

Change-Id: I746b990e1174a613189657566974b41e53b23456
Signed-off-by: Richard Spiegel 
---
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/acpi/lpc.asl
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/29627/1

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 4411984..d6af91a 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -385,4 +385,8 @@
      return to S0.  Otherwise the system will remain in S5 once power
      is restored.

+config ACPI_PC_SPKR
+	bool
+	default n
+
 endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
diff --git a/src/soc/amd/stoneyridge/acpi/lpc.asl b/src/soc/amd/stoneyridge/acpi/lpc.asl
index a41357a..acddb5e 100644
--- a/src/soc/amd/stoneyridge/acpi/lpc.asl
+++ b/src/soc/amd/stoneyridge/acpi/lpc.asl
@@ -65,12 +65,14 @@
    	})
    } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */

+#if IS_ENABLED(CONFIG_ACPI_PC_SPKR)
    Device(SPKR) {	/* Speaker */
    	Name(_HID,EISAID("PNP0800"))	/* AT style speaker */
    	Name(_CRS, ResourceTemplate() {
    		IO(Decode16, 0x0061, 0x0061, 0, 1)
    	})
    } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
+#endif

Device(PIC) {
    	Name(_HID,EISAID("PNP0000"))	/* AT Interrupt Controller */