Change in coreboot[master]: mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd
Ravishankar Sarawadi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45031 )
Change subject: mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd ......................................................................
mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd
GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function (NF1) without internal pull-down which wrongly presents HPD interrupts. DP_HPD had been removed for EVT design as those events are through eSPI. This change configures GPP_A19 and GPP_A20 to be no connection and disables DdiPort1Hpd and DdiPort2Hpd.
BUG=b:162566436 TEST=Booted to kernel and verified no kernel HPD pins assertion message on Delbin board.
Signed-off-by: Ravi Sarawadi ravishankar.sarawadi@intel.com Change-Id: Ifdef8ee438276678258b75d2fb70c6dfc7ee0a33 --- M src/mainboard/google/volteer/variants/delbin/gpio.c M src/mainboard/google/volteer/variants/delbin/overridetree.cb 2 files changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/45031/1
diff --git a/src/mainboard/google/volteer/variants/delbin/gpio.c b/src/mainboard/google/volteer/variants/delbin/gpio.c index 1d4bfe6..5748bb3 100644 --- a/src/mainboard/google/volteer/variants/delbin/gpio.c +++ b/src/mainboard/google/volteer/variants/delbin/gpio.c @@ -19,9 +19,9 @@ /* A18 : DDSP_HPDB ==> HDMI_HPD */ PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */ - PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), + PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */ - PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), + PAD_NC(GPP_A20, NONE), /* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */ PAD_CFG_GPO(GPP_A22, 1, DEEP), /* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */ diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb index fc549c7..05c8a34 100644 --- a/src/mainboard/google/volteer/variants/delbin/overridetree.cb +++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb @@ -1,4 +1,7 @@ chip soc/intel/tigerlake + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45031 )
Change subject: mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd ......................................................................
Patch Set 1: Code-Review+2
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45031 )
Change subject: mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd ......................................................................
Patch Set 1:
could we merge this? this is blocking multiple issues on dlebin and eldrid.
thank you very much.
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45031 )
Change subject: mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd ......................................................................
Patch Set 1:
Patch Set 1:
could we merge this? this is blocking multiple issues on dlebin and eldrid.
thank you very much.
correction, there should be another similar patch for eldrid.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45031 )
Change subject: mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd ......................................................................
mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd
GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function (NF1) without internal pull-down which wrongly presents HPD interrupts. DP_HPD had been removed for EVT design as those events are through eSPI. This change configures GPP_A19 and GPP_A20 to be no connection and disables DdiPort1Hpd and DdiPort2Hpd.
BUG=b:162566436 TEST=Booted to kernel and verified no kernel HPD pins assertion message on Delbin board.
Signed-off-by: Ravi Sarawadi ravishankar.sarawadi@intel.com Change-Id: Ifdef8ee438276678258b75d2fb70c6dfc7ee0a33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45031 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Caveh Jalali caveh@chromium.org --- M src/mainboard/google/volteer/variants/delbin/gpio.c M src/mainboard/google/volteer/variants/delbin/overridetree.cb 2 files changed, 5 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Caveh Jalali: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/delbin/gpio.c b/src/mainboard/google/volteer/variants/delbin/gpio.c index 1d4bfe6..5748bb3 100644 --- a/src/mainboard/google/volteer/variants/delbin/gpio.c +++ b/src/mainboard/google/volteer/variants/delbin/gpio.c @@ -19,9 +19,9 @@ /* A18 : DDSP_HPDB ==> HDMI_HPD */ PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */ - PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), + PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */ - PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), + PAD_NC(GPP_A20, NONE), /* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */ PAD_CFG_GPO(GPP_A22, 1, DEEP), /* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */ diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb index fc549c7..05c8a34 100644 --- a/src/mainboard/google/volteer/variants/delbin/overridetree.cb +++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb @@ -1,4 +1,7 @@ chip soc/intel/tigerlake + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic
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Caveh Jalali (Code Review) -
Kane Chen (Code Review)
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Patrick Georgi (Code Review)
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Ravishankar Sarawadi (Code Review)