Change in ...coreboot[master]: ich7/i945: Write XCAP for D28:F0/F1/F2/F3/F4/F5

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32362

Change subject: ich7/i945: Write XCAP for D28:F0/F1/F2/F3/F4/F5
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ich7/i945: Write XCAP for D28:F0/F1/F2/F3/F4/F5

This write 1 into R/WO [Bit 8] XCAP registry.
Probably this needs to move to southbridge.

Change-Id: Ibacdf07d8f6410bffbf6080b9aead0ac8e4814b1
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/early_init.c
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/32362/1

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 0c92c4b..f946970 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -333,6 +333,7 @@
 {
    u16 reg16;
    u32 reg32;
+	int i;

reg16 = RCBA16(LCTL);
    reg16 &= ~(3 << 0);
@@ -342,10 +343,11 @@
    RCBA32(V0CTL) = 0x80000001;
    RCBA32(V1CAP) = 0x03128010;

-	pci_write_config16(PCI_DEV(0, 0x1c, 0), 0x42, 0x0141);
-	pci_write_config16(PCI_DEV(0, 0x1c, 4), 0x42, 0x0141);
-	pci_write_config16(PCI_DEV(0, 0x1c, 5), 0x42, 0x0141);
-
+	for (i = 0; i < 6; ++i) { /* D28:F0/F1/F2/F3/F4/F5 */
+		reg16 = read_config16(PCI_DEV(0, 0x1c, i), 0x42);
+		reg16 |= (1 << 8);
+		pci_write_config16(PCI_DEV(0, 0x1c, i), 0x42, reg16);
+	}
    pci_write_config32(PCI_DEV(0, 0x1c, 4), 0x54, 0x00480ce0);
    pci_write_config32(PCI_DEV(0, 0x1c, 5), 0x54, 0x00500ce0);

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32362

to look at the new patch set (#2).

Change subject: ich7/i945: Write XCAP for D28:F0/F1/F2/F3/F4/F5
......................................................................

ich7/i945: Write XCAP for D28:F0/F1/F2/F3/F4/F5

This write 1 into R/WO [Bit 8] XCAP registry.
Probably this needs to move to southbridge.

Change-Id: Ibacdf07d8f6410bffbf6080b9aead0ac8e4814b1
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/early_init.c
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/32362/2

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32362 )

Change subject: ich7/i945: Write XCAP for D28:F0/F1/F2/F3/F4/F5
......................................................................

Abandoned

it needs more work that what I did ...