Change in coreboot[master]: mb/intel/cedarisland: Use FSP_M_CONFIG structure to set UPD

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43923 )

Change subject: mb/intel/cedarisland: Use FSP_M_CONFIG structure to set UPD
......................................................................

mb/intel/cedarisland: Use FSP_M_CONFIG structure to set UPD

According to src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h,
use FSP_M_CONFIG structure fields to configure UPD options for FSP-M
in romstage instead of raw offsets.

Change-Id: Idb25d8954b09805b496ab97b341a8ef1ac38bb6a
Signed-off-by: Maxim Polyakov 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43923
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/mainboard/intel/cedarisland_crb/romstage.c
1 file changed, 5 insertions(+), 16 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/intel/cedarisland_crb/romstage.c b/src/mainboard/intel/cedarisland_crb/romstage.c
index e82d26b..8468605 100644
--- a/src/mainboard/intel/cedarisland_crb/romstage.c
+++ b/src/mainboard/intel/cedarisland_crb/romstage.c
@@ -1,25 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <arch/mmio.h>
 #include <soc/romstage.h>

void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
    FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
-	void *start = (void *) m_cfg;

-	// BoardId
-	write8(start + 140, 0x1d);
-
-	// BoardTypeBitmask
-	write32(start + 104, 0x11111111);
-
-	// DebugPrintLevel
-	write8(start + 45, 8);
-
-	// KtiLinkSpeedMode
-	write8(start + 64, 0);
-
-	// KtiPrefetchEn
-	write8(start + 53, 2);
+	m_cfg->BoardId = 0x1d;
+	m_cfg->BoardTypeBitmask = 0x11111111;
+	m_cfg->DebugPrintLevel = 8;
+	m_cfg->KtiLinkSpeedMode = 0;
+	m_cfg->KtiPrefetchEn = 2;
 }