Change in coreboot[master]: cpu/intel/*: Set SMM SMRR code access check bit

[Subrata Banik (Code Review)]

Attention is currently required from: Jeff Daly, Mariusz Szafrański, Tim Wawrzynczak, Suresh Bellampalli, Paul Menzel, Vanessa Eusebio, Arthur Heymans.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63788 )

Change subject: cpu/intel/*: Set SMM SMRR code access check bit
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Patch Set 4:

(3 comments)

File src/include/cpu/intel/smm_reloc.h:

https://review.coreboot.org/c/coreboot/+/63788/comment/56805718_bcf95add 
PS4, Line 102: SMM_CODE_ACESSS_CHK_MASK
also in case bit 58 is not set, do we expected to alert the user ?

https://review.coreboot.org/c/coreboot/+/63788/comment/f1f424c7_9397aa4e 
PS4, Line 105: 	}
> still need the wrmsr(smm_feature) here

you missed wrmsr looks like

File src/soc/intel/denverton_ns/smihandler.c:

https://review.coreboot.org/c/coreboot/+/63788/comment/fe8c2502_b6a3d553 
PS4, Line 6: #include <cpu/intel/em64t100_save_state.h>
           : #include <cpu/intel/smm_reloc.h>
can u also capture the order change in commit msg as well ? or prefer to do in incremental CL?