Change in coreboot[master]: soc/intel/alderlake: Enable HWP CPPC support in CB

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51795 )

Change subject: soc/intel/alderlake: Enable HWP CPPC support in CB
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soc/intel/alderlake: Enable HWP CPPC support in CB

Kconfig change which enables the hwp cppc acpi support is to get the
maximum performance of each CPU to check and enable Intel Turbo Boost
Max Technology.

BUG=none
BRANCH=none
TEST=check GCPC and CPC generated in acpi tables for each CPU

Change-Id: I5d93774e8025466f1911cf77459910fe872bfcc8
Signed-off-by: ravindr1 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51795
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Ravindra: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 2efe760..7480a41 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -47,6 +47,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC
    select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO
    select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG