Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32132
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
arch/x86/smbios: Reference type 7
Fill in the handle to cache entries of type 7 in the type 4 structure.
Change-Id: Idf876b0c21c65f72a945d26c5898074b140763f8 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/arch/x86/smbios.c 1 file changed, 24 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/32132/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index be024c16..68fca21 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -694,10 +694,12 @@ * @param current Pointer to memory address to write the tables to * @param handle Pointer to the handle for the tables * @param max_struct_size Pointer to maximum struct size + * @param type4 Pointer to SMBIOS type 4 structure */ static int smbios_write_type7_cache_parameters(unsigned long *current, int *handle, - int *max_struct_size) + int *max_struct_size, + struct smbios_type4 *type4) { struct cpuid_result res; unsigned int cnt = 0; @@ -730,6 +732,7 @@ while (1) { enum smbios_cache_associativity associativity; enum smbios_cache_type type; + const int h = (*handle)++;
res = cpuid_ext(leaf, cnt++);
@@ -766,9 +769,23 @@ else associativity = smbios_cache_associativity(assoc);
- update_max(len, *max_struct_size, smbios_write_type7(current, - *handle++, level, SMBIOS_CACHE_SRAM_TYPE_UNKNOWN, - associativity, type, cache_size, cache_size)); + update_max(len, *max_struct_size, smbios_write_type7(current, h, + level, SMBIOS_CACHE_SRAM_TYPE_UNKNOWN, associativity, + type, cache_size, cache_size)); + + if (type4) { + switch (level) { + case 1: + type4->l1_cache_handle = h; + break; + case 2: + type4->l2_cache_handle = h; + break; + case 3: + type4->l3_cache_handle = h; + break; + } + } };
return len; @@ -945,10 +962,12 @@ handle++; update_max(len, max_struct_size, smbios_write_type3(¤t, handle++)); + + struct smbios_type4 *type4 = (struct smbios_type4 *)current; update_max(len, max_struct_size, smbios_write_type4(¤t, handle++)); smbios_write_type7_cache_parameters(¤t, &handle, - &max_struct_size); + &max_struct_size, type4); update_max(len, max_struct_size, smbios_write_type11(¤t, &handle)); if (CONFIG(ELOG))
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32132 )
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/32132/2/src/arch/x86/smbios.c File src/arch/x86/smbios.c:
https://review.coreboot.org/#/c/32132/2/src/arch/x86/smbios.c@780 PS2, Line 780: break; Indent the break?
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32132
to look at the new patch set (#3).
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
arch/x86/smbios: Reference type 7
Fill in the handle to cache entries of type 7 in the type 4 structure.
Tested on Intel Sandy Bridge (Lenovo T520). All 3 caches are referenced.
Change-Id: Idf876b0c21c65f72a945d26c5898074b140763f8 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/arch/x86/smbios.c 1 file changed, 24 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/32132/3
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32132 )
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
Patch Set 3:
(1 comment)
Tested on Lenovo T520 (Intel Sandy Bridge). All caches are referenced in type 4.
https://review.coreboot.org/#/c/32132/2/src/arch/x86/smbios.c File src/arch/x86/smbios.c:
https://review.coreboot.org/#/c/32132/2/src/arch/x86/smbios.c@780 PS2, Line 780: break;
Indent the break?
Done
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32132 )
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
Patch Set 4: Code-Review+1
Hello HAOUAS Elyes, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32132
to look at the new patch set (#6).
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
arch/x86/smbios: Reference type 7
Fill in the handle to cache entries of type 7 in the type 4 structure.
Tested on Intel Sandy Bridge (Lenovo T520). All 3 caches are referenced.
Change-Id: Idf876b0c21c65f72a945d26c5898074b140763f8 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/arch/x86/smbios.c 1 file changed, 24 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/32132/6
Hello HAOUAS Elyes, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32132
to look at the new patch set (#7).
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
arch/x86/smbios: Reference type 7
Fill in the handle to cache entries of type 7 in the type 4 structure.
Tested on Intel Sandy Bridge (Lenovo T520). All 3 caches are referenced.
Change-Id: Idf876b0c21c65f72a945d26c5898074b140763f8 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/arch/x86/smbios.c 1 file changed, 25 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/32132/7
Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32132 )
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
Patch Set 7: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32132 )
Change subject: arch/x86/smbios: Reference type 7 ......................................................................
arch/x86/smbios: Reference type 7
Fill in the handle to cache entries of type 7 in the type 4 structure.
Tested on Intel Sandy Bridge (Lenovo T520). All 3 caches are referenced.
Change-Id: Idf876b0c21c65f72a945d26c5898074b140763f8 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32132 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Richard Spiegel richard.spiegel@silverbackltd.com --- M src/arch/x86/smbios.c 1 file changed, 25 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Richard Spiegel: Looks good to me, approved
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 0f9b458..44ff578 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -730,10 +730,12 @@ * @param current Pointer to memory address to write the tables to * @param handle Pointer to handle for the tables * @param max_struct_size Pointer to maximum struct size + * @param type4 Pointer to SMBIOS type 4 structure */ static int smbios_write_type7_cache_parameters(unsigned long *current, int *handle, - int *max_struct_size) + int *max_struct_size, + struct smbios_type4 *type4) { struct cpuid_result res; unsigned int cnt = 0; @@ -802,9 +804,25 @@ else associativity = smbios_cache_associativity(assoc);
- update_max(len, *max_struct_size, smbios_write_type7(current, - *handle++, level, SMBIOS_CACHE_SRAM_TYPE_UNKNOWN, - associativity, type, cache_size, cache_size)); + const int h = (*handle)++; + + update_max(len, *max_struct_size, smbios_write_type7(current, h, + level, SMBIOS_CACHE_SRAM_TYPE_UNKNOWN, associativity, + type, cache_size, cache_size)); + + if (type4) { + switch (level) { + case 1: + type4->l1_cache_handle = h; + break; + case 2: + type4->l2_cache_handle = h; + break; + case 3: + type4->l3_cache_handle = h; + break; + } + } };
return len; @@ -981,10 +999,12 @@ handle++; update_max(len, max_struct_size, smbios_write_type3(¤t, handle++)); + + struct smbios_type4 *type4 = (struct smbios_type4 *)current; update_max(len, max_struct_size, smbios_write_type4(¤t, handle++)); len += smbios_write_type7_cache_parameters(¤t, &handle, - &max_struct_size); + &max_struct_size, type4); update_max(len, max_struct_size, smbios_write_type11(¤t, &handle)); if (CONFIG(ELOG))
-
HAOUAS Elyes (Code Review) -
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)
-
Richard Spiegel (Code Review)