Change in coreboot[master]: amd/stoneyridge: Load AOAC and USB gnvs values

[Richard Spiegel (Code Review)]

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/28767 )

Change subject: amd/stoneyridge: Load AOAC and USB gnvs values
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Patch Set 1:

(3 comments)

https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge....
File src/soc/amd/stoneyridge/southbridge.c:

https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge....
PS1, Line 910: 	sd = dev_find_slot(0, SD_DEVFN);
             :
> Use is_aoac_device_enabled(FCH_AOAC_D3_STATE_SD), declaring FCH_AOAC_D3_STATE_SD = 0x70

Sorry, 0x71 is the state

https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge....
PS1, Line 912: 	sata = dev_find_slot(0, SATA_DEVFN);
             :
> Use is_aoac_device_enabled(FCH_AOAC_D3_STATE_SATA), declaring FCH_AOAC_D3_STATE_SATA = 0x5E

Sorry, 0x5F is the state

https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge....
PS1, Line 914: 1;
> Can you be sure it'll be enabled? ESPI is not the same as SPI. […]

Sorry, 0x77 is the state