Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30551
Change subject: mb/google/dragonegg: Make WP_RO range align with winbond specification ......................................................................
mb/google/dragonegg: Make WP_RO range align with winbond specification
This patch ensures to make memory protected range between 0x800000 - 0xFFFFFF as per winbond spi datasheet https://www.winbond.com/resource-files/w25q128fv_revhh1_100913_website1.pdf
Change-Id: Ife451233f60ef680088babbc824bfc5a17078cb9 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dragonegg/chromeos.fmd 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/30551/1
diff --git a/src/mainboard/google/dragonegg/chromeos.fmd b/src/mainboard/google/dragonegg/chromeos.fmd index 07a6987..ea449fe 100644 --- a/src/mainboard/google/dragonegg/chromeos.fmd +++ b/src/mainboard/google/dragonegg/chromeos.fmd @@ -27,15 +27,15 @@ RW_VPD@0x28000 0x2000 RW_NVRAM@0x2a000 0x6000 } - RW_LEGACY(CBFS)@0x5d0000 0x200000 - WP_RO@0x7d0000 0x430000 { + RW_LEGACY(CBFS)@0x5d0000 0x230000 + WP_RO@0x800000 0x400000 { RO_VPD@0x0 0x4000 - RO_SECTION@0x4000 0x42c000 { + RO_SECTION@0x4000 0x3fc000 { FMAP@0x0 0x800 RO_FRID@0x800 0x40 RO_FRID_PAD@0x840 0x7c0 GBB@0x1000 0xef000 - COREBOOT(CBFS)@0xf0000 0x33c000 + COREBOOT(CBFS)@0xf0000 0x30c000 } } }