Change in coreboot[master]: sb/intel/i82801gx: Prepare for x86_64

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56020 )

Change subject: sb/intel/i82801gx: Prepare for x86_64
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sb/intel/i82801gx: Prepare for x86_64

Do the usual int conversions.

TESTED: BUILD_TIMELESS=1 produces identical image on foxconn/g41m.

Change-Id: Idebfe4669854b307bee653df6d93e46ae3f39dec
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56020
Reviewed-by: Nico Huber 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/southbridge/intel/i82801gx/azalia.c
1 file changed, 2 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index 3ace204..fde06b4 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -8,6 +8,7 @@
 #include <device/mmio.h>
 #include <delay.h>
 #include <device/azalia_device.h>
+#include <stdint.h>
 #include "chip.h"
 #include "i82801gx.h"

@@ -192,7 +193,7 @@
    // NOTE this will break as soon as the Azalia get's a bar above 4G.
    // Is there anything we can do about it?
    base = res2mmio(res, 0, 0);
-	printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
+	printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)(uintptr_t)base);
    codec_mask = codec_detect(base);

if (codec_mask) {