Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/28937 )
Change subject: soc/intel/cannonlake: Add back PM TIMER EMULATION
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Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/28937/2/src/soc/intel/cannonlake/include/soc...
File src/soc/intel/cannonlake/include/soc/msr.h:
https://review.coreboot.org/#/c/28937/2/src/soc/intel/cannonlake/include/soc...
PS2, Line 24:
is this extra space?
Usually people have an extra space to differentiate a whole register and register bit under, I can take that out to avoid confusion.
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