Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39981 )
Change subject: mb/google/glados: clean up variant devicetrees ......................................................................
mb/google/glados: clean up variant devicetrees
In preparation for conversion to overridetree format, clean up the variant devicetrees in order to minimize the differences across glados variants. This entails:
- minor reformatting and reordering of devicetree entries - addition of setting default values on boards which skipped them - disabling unused I2C2 on boards which left it enabled - setting the TCC offset for all SKL-Y boards - setting VR mailbox command 1 for all SKL-Y boards - skipping init for Uart2 on cave and glados - dropping unused PCIe RP5 for sentry
Change-Id: I628b20a69fab187e67901c9eb98c0e2ddcb76b0d Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/glados/variants/asuka/devicetree.cb M src/mainboard/google/glados/variants/caroline/devicetree.cb M src/mainboard/google/glados/variants/cave/devicetree.cb M src/mainboard/google/glados/variants/chell/devicetree.cb M src/mainboard/google/glados/variants/glados/devicetree.cb M src/mainboard/google/glados/variants/lars/devicetree.cb M src/mainboard/google/glados/variants/sentry/devicetree.cb 7 files changed, 92 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/39981/1
diff --git a/src/mainboard/google/glados/variants/asuka/devicetree.cb b/src/mainboard/google/glados/variants/asuka/devicetree.cb index 772584d..e1e68ca 100644 --- a/src/mainboard/google/glados/variants/asuka/devicetree.cb +++ b/src/mainboard/google/glados/variants/asuka/devicetree.cb @@ -34,13 +34,23 @@ register "dptf_enable" = "1"
# FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -146,8 +156,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (board) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -163,6 +171,9 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25"
diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb index 6314af8..00b29b7 100644 --- a/src/mainboard/google/glados/variants/caroline/devicetree.cb +++ b/src/mainboard/google/glados/variants/caroline/devicetree.cb @@ -61,8 +61,14 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- # TCC offset - register "tcc_offset" = "10" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11"
# VR Slew rate setting for improving audible noise register "AcousticNoiseMitigation" = "1" @@ -137,7 +143,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -160,7 +166,7 @@ register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoDisabled, [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, @@ -177,9 +183,15 @@ # PL2 override 15W register "tdp_pl2_override" = "15"
+ # Send an extra VR mailbox command for the supported MPS IMVP8 model + register "SendVrMbxCmd" = "1" + + # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, }"
device cpu_cluster 0 on @@ -208,7 +220,7 @@ device i2c 4a on end end end # I2C #1 - device pci 15.2 on end # I2C #2 + device pci 15.2 off end # I2C #2 device pci 15.3 off end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 diff --git a/src/mainboard/google/glados/variants/cave/devicetree.cb b/src/mainboard/google/glados/variants/cave/devicetree.cb index 1d04a8e..41bb82e 100644 --- a/src/mainboard/google/glados/variants/cave/devicetree.cb +++ b/src/mainboard/google/glados/variants/cave/devicetree.cb @@ -167,7 +167,7 @@ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, - [PchSerialIoIndexUart2] = PchSerialIoPci, + [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
# I2C4 is 1.8V @@ -176,11 +176,12 @@ # PL2 override 15W register "tdp_pl2_override" = "15"
- register "tcc_offset" = "10" # TCC of 90C - # Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1"
+ # TCC of 90C + register "tcc_offset" = "10" + # Use default SD card detect GPIO configuration register "sdcard_cd_gpio_default" = "GPP_A7"
diff --git a/src/mainboard/google/glados/variants/chell/devicetree.cb b/src/mainboard/google/glados/variants/chell/devicetree.cb index 89f1c08..c0fb07c 100644 --- a/src/mainboard/google/glados/variants/chell/devicetree.cb +++ b/src/mainboard/google/glados/variants/chell/devicetree.cb @@ -136,7 +136,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -155,7 +155,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
# Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ @@ -172,17 +171,21 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 15W register "tdp_pl2_override" = "15"
- register "tcc_offset" = "10" # TCC of 90C - # Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1"
+ # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, }"
device cpu_cluster 0 on diff --git a/src/mainboard/google/glados/variants/glados/devicetree.cb b/src/mainboard/google/glados/variants/glados/devicetree.cb index 2016625..d63d9c1 100644 --- a/src/mainboard/google/glados/variants/glados/devicetree.cb +++ b/src/mainboard/google/glados/variants/glados/devicetree.cb @@ -136,7 +136,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -155,8 +155,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 1 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Port 2
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -169,15 +167,21 @@ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, - [PchSerialIoIndexUart2] = PchSerialIoPci, + [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 15W register "tdp_pl2_override" = "15"
# Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1"
+ # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, diff --git a/src/mainboard/google/glados/variants/lars/devicetree.cb b/src/mainboard/google/glados/variants/lars/devicetree.cb index 76e614d..419d140 100644 --- a/src/mainboard/google/glados/variants/lars/devicetree.cb +++ b/src/mainboard/google/glados/variants/lars/devicetree.cb @@ -9,6 +9,8 @@ register "gpu_pch_backlight_pwm_hz" = "1000"
# Enable deep Sx states + register "deep_s3_enable_ac" = "0" + register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "1" register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" @@ -32,13 +34,23 @@ register "dptf_enable" = "1"
# FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -124,7 +136,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -143,8 +155,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -160,6 +170,9 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25"
diff --git a/src/mainboard/google/glados/variants/sentry/devicetree.cb b/src/mainboard/google/glados/variants/sentry/devicetree.cb index 3e2137b..57586fb 100644 --- a/src/mainboard/google/glados/variants/sentry/devicetree.cb +++ b/src/mainboard/google/glados/variants/sentry/devicetree.cb @@ -34,13 +34,23 @@ register "dptf_enable" = "1"
# FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -126,14 +136,18 @@ .voltage_limit = 1520, }"
- # Enable Root port 1 and 5. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" - register "PcieRpEnable[4]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" - register "PcieRpClkReqSupport[4]" = "1" - # RP 1 uses SRCCLKREQ1# while RP 5 uses SRCCLKREQ2# + # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" + + # Enable Root port 5 + register "PcieRpEnable[4]" = "1" + # Enable CLKREQ# + register "PcieRpClkReqSupport[4]" = "1" + # RP 5 uses SRCCLKREQ2# register "PcieRpClkReqNumber[4]" = "2"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port 1 @@ -148,9 +162,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
- register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # I2C0 is 3.3V - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -166,6 +177,12 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C0 is 3.3V + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + + # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25"
@@ -263,7 +280,7 @@ device pci 1c.1 off end # PCI Express Port 2 device pci 1c.2 off end # PCI Express Port 3 device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 on end # PCI Express Port 5 + device pci 1c.4 off end # PCI Express Port 5 device pci 1c.5 off end # PCI Express Port 6 device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 off end # PCI Express Port 8
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39981 )
Change subject: mb/google/glados: clean up variant devicetrees ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/39981/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39981/1//COMMIT_MSG@18 PS1, Line 18: Uart2 UART2
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39981
to look at the new patch set (#2).
Change subject: mb/google/glados: clean up variant devicetrees ......................................................................
mb/google/glados: clean up variant devicetrees
In preparation for conversion to overridetree format, clean up the variant devicetrees in order to minimize the differences across glados variants. This entails:
- minor reformatting and reordering of devicetree entries - addition of setting default values on boards which skipped them - disabling unused I2C2 on boards which left it enabled - ensuring TCC offset set for all SKL-Y boards - setting VR mailbox command 1 for caroline - skipping init for UART2 on cave and glados - dropping unused PCIe RP5 for sentry
Change-Id: I628b20a69fab187e67901c9eb98c0e2ddcb76b0d Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/glados/variants/asuka/devicetree.cb M src/mainboard/google/glados/variants/caroline/devicetree.cb M src/mainboard/google/glados/variants/cave/devicetree.cb M src/mainboard/google/glados/variants/chell/devicetree.cb M src/mainboard/google/glados/variants/glados/devicetree.cb M src/mainboard/google/glados/variants/lars/devicetree.cb M src/mainboard/google/glados/variants/sentry/devicetree.cb 7 files changed, 92 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/39981/2
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39981 )
Change subject: mb/google/glados: clean up variant devicetrees ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39981/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39981/1//COMMIT_MSG@18 PS1, Line 18: Uart2
UART2
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39981 )
Change subject: mb/google/glados: clean up variant devicetrees ......................................................................
Patch Set 3: Code-Review+2
Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39981 )
Change subject: mb/google/glados: clean up variant devicetrees ......................................................................
mb/google/glados: clean up variant devicetrees
In preparation for conversion to overridetree format, clean up the variant devicetrees in order to minimize the differences across glados variants. This entails:
- minor reformatting and reordering of devicetree entries - addition of setting default values on boards which skipped them - disabling unused I2C2 on boards which left it enabled - ensuring TCC offset set for all SKL-Y boards - setting VR mailbox command 1 for caroline - skipping init for UART2 on cave and glados - dropping unused PCIe RP5 for sentry
Change-Id: I628b20a69fab187e67901c9eb98c0e2ddcb76b0d Signed-off-by: Matt DeVillier matt.devillier@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39981 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/glados/variants/asuka/devicetree.cb M src/mainboard/google/glados/variants/caroline/devicetree.cb M src/mainboard/google/glados/variants/cave/devicetree.cb M src/mainboard/google/glados/variants/chell/devicetree.cb M src/mainboard/google/glados/variants/glados/devicetree.cb M src/mainboard/google/glados/variants/lars/devicetree.cb M src/mainboard/google/glados/variants/sentry/devicetree.cb 7 files changed, 92 insertions(+), 31 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/glados/variants/asuka/devicetree.cb b/src/mainboard/google/glados/variants/asuka/devicetree.cb index 772584d..e1e68ca 100644 --- a/src/mainboard/google/glados/variants/asuka/devicetree.cb +++ b/src/mainboard/google/glados/variants/asuka/devicetree.cb @@ -34,13 +34,23 @@ register "dptf_enable" = "1"
# FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -146,8 +156,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (board) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -163,6 +171,9 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25"
diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb index 6314af8..00b29b7 100644 --- a/src/mainboard/google/glados/variants/caroline/devicetree.cb +++ b/src/mainboard/google/glados/variants/caroline/devicetree.cb @@ -61,8 +61,14 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- # TCC offset - register "tcc_offset" = "10" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11"
# VR Slew rate setting for improving audible noise register "AcousticNoiseMitigation" = "1" @@ -137,7 +143,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -160,7 +166,7 @@ register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoDisabled, [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, @@ -177,9 +183,15 @@ # PL2 override 15W register "tdp_pl2_override" = "15"
+ # Send an extra VR mailbox command for the supported MPS IMVP8 model + register "SendVrMbxCmd" = "1" + + # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, }"
device cpu_cluster 0 on @@ -208,7 +220,7 @@ device i2c 4a on end end end # I2C #1 - device pci 15.2 on end # I2C #2 + device pci 15.2 off end # I2C #2 device pci 15.3 off end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 diff --git a/src/mainboard/google/glados/variants/cave/devicetree.cb b/src/mainboard/google/glados/variants/cave/devicetree.cb index 1d04a8e..41bb82e 100644 --- a/src/mainboard/google/glados/variants/cave/devicetree.cb +++ b/src/mainboard/google/glados/variants/cave/devicetree.cb @@ -167,7 +167,7 @@ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, - [PchSerialIoIndexUart2] = PchSerialIoPci, + [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
# I2C4 is 1.8V @@ -176,11 +176,12 @@ # PL2 override 15W register "tdp_pl2_override" = "15"
- register "tcc_offset" = "10" # TCC of 90C - # Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1"
+ # TCC of 90C + register "tcc_offset" = "10" + # Use default SD card detect GPIO configuration register "sdcard_cd_gpio_default" = "GPP_A7"
diff --git a/src/mainboard/google/glados/variants/chell/devicetree.cb b/src/mainboard/google/glados/variants/chell/devicetree.cb index 89f1c08..c0fb07c 100644 --- a/src/mainboard/google/glados/variants/chell/devicetree.cb +++ b/src/mainboard/google/glados/variants/chell/devicetree.cb @@ -136,7 +136,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -155,7 +155,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
# Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ @@ -172,17 +171,21 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 15W register "tdp_pl2_override" = "15"
- register "tcc_offset" = "10" # TCC of 90C - # Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1"
+ # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, }"
device cpu_cluster 0 on diff --git a/src/mainboard/google/glados/variants/glados/devicetree.cb b/src/mainboard/google/glados/variants/glados/devicetree.cb index 2016625..d63d9c1 100644 --- a/src/mainboard/google/glados/variants/glados/devicetree.cb +++ b/src/mainboard/google/glados/variants/glados/devicetree.cb @@ -136,7 +136,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -155,8 +155,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 1 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Port 2
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -169,15 +167,21 @@ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, - [PchSerialIoIndexUart2] = PchSerialIoPci, + [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 15W register "tdp_pl2_override" = "15"
# Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1"
+ # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, diff --git a/src/mainboard/google/glados/variants/lars/devicetree.cb b/src/mainboard/google/glados/variants/lars/devicetree.cb index 76e614d..419d140 100644 --- a/src/mainboard/google/glados/variants/lars/devicetree.cb +++ b/src/mainboard/google/glados/variants/lars/devicetree.cb @@ -9,6 +9,8 @@ register "gpu_pch_backlight_pwm_hz" = "1000"
# Enable deep Sx states + register "deep_s3_enable_ac" = "0" + register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "1" register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" @@ -32,13 +34,23 @@ register "dptf_enable" = "1"
# FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -124,7 +136,7 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -143,8 +155,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -160,6 +170,9 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25"
diff --git a/src/mainboard/google/glados/variants/sentry/devicetree.cb b/src/mainboard/google/glados/variants/sentry/devicetree.cb index 3e2137b..57586fb 100644 --- a/src/mainboard/google/glados/variants/sentry/devicetree.cb +++ b/src/mainboard/google/glados/variants/sentry/devicetree.cb @@ -34,13 +34,23 @@ register "dptf_enable" = "1"
# FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -126,14 +136,18 @@ .voltage_limit = 1520, }"
- # Enable Root port 1 and 5. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" - register "PcieRpEnable[4]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" - register "PcieRpClkReqSupport[4]" = "1" - # RP 1 uses SRCCLKREQ1# while RP 5 uses SRCCLKREQ2# + # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" + + # Enable Root port 5 + register "PcieRpEnable[4]" = "1" + # Enable CLKREQ# + register "PcieRpClkReqSupport[4]" = "1" + # RP 5 uses SRCCLKREQ2# register "PcieRpClkReqNumber[4]" = "2"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port 1 @@ -148,9 +162,6 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
- register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # I2C0 is 3.3V - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -166,6 +177,12 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
+ # I2C0 is 3.3V + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + + # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25"
@@ -263,7 +280,7 @@ device pci 1c.1 off end # PCI Express Port 2 device pci 1c.2 off end # PCI Express Port 3 device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 on end # PCI Express Port 5 + device pci 1c.4 off end # PCI Express Port 5 device pci 1c.5 off end # PCI Express Port 6 device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 off end # PCI Express Port 8
-
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Matt DeVillier (Code Review)