John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer
This explicitly enables both of TCSS DMA0 and DMA1 controllers from Volteer devicetree.cb setting.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 7 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index b689663..70f2968 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -125,8 +125,13 @@
# TCSS USB3 register "TcssXhciEn" = "1" + register "TcssXdciEn" = "0" register "TcssAuxOri" = "0"
+ # TCSS DMA + register "TcssDma0En" = "1" + register "TcssDma1En" = "1" + # DP port register "DdiPortAConfig" = "1" # eDP register "DdiPortBConfig" = "0" @@ -216,8 +221,8 @@ device pci 0a.0 off end # Crash-log SRAM 0x9A0D device pci 0d.0 on end # USB xHCI 0x9A13 device pci 0d.1 off end # USB xDCI (OTG) 0x9A15 - device pci 0d.2 off end # TBT DMA0 0x9A1B - device pci 0d.3 off end # TBT DMA1 0x9A1D + device pci 0d.2 on end # TBT DMA0 0x9A1B + device pci 0d.3 on end # TBT DMA1 0x9A1D device pci 0e.0 off end # VMD 0x9A0B
# From PCH EDS(576591)
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 2:
The first patchset worked for me / booted my SKU4.
Hello build bot (Jenkins), Wonkyu Kim, Caveh Jalali, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41387
to look at the new patch set (#4).
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer
This explicitly enables both of TCSS DMA0 and DMA1 controllers from Volteer devicetree.cb setting.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 6 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 4: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 140: TcssDma0En Why is the SoC code not using on/off for 0d.2 to decide whether to set TcssDma0En to 1/0? I think we should update that as a follow-up.
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 141: TcssDma1En Same here for 0d.3
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 140: TcssDma0En
Why is the SoC code not using on/off for 0d. […]
Sure, TcssDma0En can be determined based on the 0d.2 on/off.
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 141: TcssDma1En
Same here for 0d. […]
Ack
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 4:
(1 comment)
Will you create another patch for handle this with
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 140: TcssDma0En
Sure, TcssDma0En can be determined based on the 0d.2 on/off.
Can you let us know the plan for this? Will you follow up these change this time? Once it's handle by 0d.2 and 0d.3, we don't need to use these variables.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 243: on Do we need this one enabled on volteer? Only TCP0/TCP1 are in use which should be the two ports on the controller at 0d.2.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 4:
(2 comments)
Patch Set 4:
(1 comment)
Will you create another patch for handle this with
yes
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 140: TcssDma0En
Can you let us know the plan for this? […]
I will drop the setting here. TcssDma0En will be based on 0d.2 on/off with another following patch.
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 243: on
Do we need this one enabled on volteer? Only TCP0/TCP1 are in use which should be the two ports on […]
There is implication for PM as TBT DMA1 is grouped together with TBT PCIe2 and PCIe3.
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Duncan Laurie, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41387
to look at the new patch set (#5).
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer
This explicitly enables both of TCSS DMA0 and DMA1 controllers from Volteer devicetree.cb setting.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/5
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 5: Code-Review+2
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 243: on
There is implication for PM as TBT DMA1 is grouped together with TBT PCIe2 and PCIe3.
Doesn't that just mean that device 7.2 and 7.3 should be off as well?
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 243: on
Doesn't that just mean that device 7.2 and 7. […]
That is correct.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 243: on
That is correct.
Are you planning on updating 7.2, 7.3 and 0d.3?
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Duncan Laurie, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41387
to look at the new patch set (#6).
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer
This explicitly enables both of TCSS DMA0 and DMA1 controllers from Volteer devicetree.cb setting.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 5 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/6
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41387/4/src/mainboard/google/voltee... PS4, Line 243: on
Are you planning on updating 7.2, 7.3 and 0d. […]
yes, updated with 07.2/07.3 and 0d.3 off.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 and DMA1 for Volteer ......................................................................
Patch Set 6: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41387/6//COMMIT_MSG@7 PS6, Line 7: Enable TCSS DMA0 and DMA1 for Volteer : : This explicitly enables both of TCSS DMA0 and DMA1 controllers : from Volteer devicetree.cb setting. : This is not correct anymore. Can you please update the commit message to reflect what is actually changing?
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Duncan Laurie, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41387
to look at the new patch set (#7).
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 for Volteer
This explicitly enables both of TCSS DMA0 and DMA1 controllers from Volteer devicetree.cb setting.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 5 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/7
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Duncan Laurie, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41387
to look at the new patch set (#8).
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 for Volteer
This explicitly enables TCSS DMA0 controller from Volteer devicetree.cb setting.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 5 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/8
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41387/6//COMMIT_MSG@7 PS6, Line 7: Enable TCSS DMA0 and DMA1 for Volteer : : This explicitly enables both of TCSS DMA0 and DMA1 controllers : from Volteer devicetree.cb setting. :
This is not correct anymore. […]
Ack
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
Patch Set 8: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41387/8//COMMIT_MSG@10 PS8, Line 10: devicetree.cb setting. Also mention that TBT PCIe2 and PCIe3 are disabled since they are unused on volteer.
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Duncan Laurie, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41387
to look at the new patch set (#9).
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 for Volteer
This explicitly enables TCSS DMA0 controller and disables TBT PCIe2 and PCIE3 since they are unused on volteer.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 5 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41387/9
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41387/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41387/8//COMMIT_MSG@10 PS8, Line 10: devicetree.cb setting.
Also mention that TBT PCIe2 and PCIe3 are disabled since they are unused on volteer.
Ack
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
mb/google/volteer: Enable TCSS DMA0 for Volteer
This explicitly enables TCSS DMA0 controller and disables TBT PCIe2 and PCIE3 since they are unused on volteer.
BUG=:b:146624360 TEST=Built and booted on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I05cc9e3964d8037d433fca443be6e8d5b444bbce Reviewed-on: https://review.coreboot.org/c/coreboot/+/41387 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 5 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index c6a2e8b..b7f2a0a 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -132,7 +132,6 @@ register "IomTypeCPortPadCfg[6]" = "0x0" register "IomTypeCPortPadCfg[7]" = "0x0"
- # D3Hot and D3Cold for TCSS register "TcssD3HotEnable" = "1" register "TcssD3ColdEnable" = "1" @@ -227,16 +226,16 @@ device pci 04.0 on end # DPTF 0x9A03 device pci 05.0 off end # IPU 0x9A19 device pci 06.0 off end # PEG60 0x9A09 - device pci 07.0 on end # TBT_PCIe0 0x9A23 - device pci 07.1 on end # TBT_PCIe1 0x9A25 - device pci 07.2 on end # TBT_PCIe2 0x9A27 - device pci 07.3 on end # TBT_PCIe3 0x9A29 + device pci 07.0 on end # TBT_PCIe0 0x9A23 + device pci 07.1 on end # TBT_PCIe1 0x9A25 + device pci 07.2 off end # TBT_PCIe2 0x9A27 + device pci 07.3 off end # TBT_PCIe3 0x9A29 device pci 08.0 on end # GNA 0x9A11 device pci 09.0 off end # NPK 0x9A33 device pci 0a.0 off end # Crash-log SRAM 0x9A0D device pci 0d.0 on end # USB xHCI 0x9A13 device pci 0d.1 off end # USB xDCI (OTG) 0x9A15 - device pci 0d.2 off end # TBT DMA0 0x9A1B + device pci 0d.2 on end # TBT DMA0 0x9A1B device pci 0d.3 off end # TBT DMA1 0x9A1D device pci 0e.0 off end # VMD 0x9A0B
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41387 )
Change subject: mb/google/volteer: Enable TCSS DMA0 for Volteer ......................................................................
Patch Set 10:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4512 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4511 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4510 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4509
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
Duncan Laurie (Code Review)
-
Furquan Shaikh (Code Review)
-
John Zhao (Code Review)
-
Nick Vaccaro (Code Review)
-
Wonkyu Kim (Code Review)