Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81626?usp=email )
Change subject: mb/google/brya: Add new baseboard trulo ......................................................................
mb/google/brya: Add new baseboard trulo
This patch adds a new baseboard trulo. This commit is a stub which only adds the minimum code needed for a successful buil.
Change-Id: Iad6230064c6b8359698d37c3e0440614cc7b073d Signed-off-by: Dinesh Gehlot digehlot@google.com --- M src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk A src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb A src/mainboard/google/brya/variants/baseboard/trulo/gpio.c A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h A src/mainboard/google/brya/variants/baseboard/trulo/memory.c 7 files changed, 117 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81626/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 160d12a..b40f025 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -125,6 +125,13 @@ select HAVE_PCIE_WWAN select HAVE_WWAN_POWER_SEQUENCE
+config BOARD_GOOGLE_BASEBOARD_TRULO + def_bool n + select BOARD_GOOGLE_BRYA_COMMON + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS + select SOC_INTEL_ALDERLAKE_PCH_N + select SYSTEM_TYPE_LAPTOP + config BOARD_GOOGLE_ANRAGGAR select BOARD_GOOGLE_BASEBOARD_NISSA select BOARD_ROMSIZE_KB_16384 @@ -555,6 +562,7 @@ default "brask" if BOARD_GOOGLE_BASEBOARD_BRASK default "hades" if BOARD_GOOGLE_BASEBOARD_HADES default "nissa" if BOARD_GOOGLE_BASEBOARD_NISSA + default "trulo" if BOARD_GOOGLE_BASEBOARD_TRULO
config CHROMEOS select EC_GOOGLE_CHROMEEC_SWITCHES @@ -657,6 +665,7 @@ default "Google_Brask" if BOARD_GOOGLE_BASEBOARD_BRASK default "Google_Hades" if BOARD_GOOGLE_BASEBOARD_HADES default "Google_Nissa" if BOARD_GOOGLE_BASEBOARD_NISSA + default "Google_Trulo" if BOARD_GOOGLE_BASEBOARD_Trulo
config MAINBOARD_PART_NUMBER default "Brya" if BOARD_GOOGLE_BRYA0 diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk new file mode 100644 index 0000000..a9bdad3 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk @@ -0,0 +1,6 @@ +bootblock-y += gpio.c + +romstage-y += memory.c +romstage-y += gpio.c + +ramstage-y += gpio.c \ No newline at end of file diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb new file mode 100644 index 0000000..a5e2217 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb @@ -0,0 +1,4 @@ +chip soc/intel/alderlake + device domain 0 on + end +end diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/gpio.c b/src/mainboard/google/brya/variants/baseboard/trulo/gpio.c new file mode 100644 index 0000000..4138762 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/gpio.c @@ -0,0 +1,43 @@ + +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <types.h> +#include <soc/gpio.h> +#include <vendorcode/google/chromeos/chromeos.h> +/* Pad configuration in ramstage */ +static const struct pad_config gpio_table[] = { + /* TODO */ +}; +/* Early pad configuration in bootblock */ +static const struct pad_config early_gpio_table[] = { + /* TODO */ +}; +const struct pad_config *__weak variant_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(gpio_table); + return gpio_table; +} +const struct pad_config *__weak variant_gpio_override_table(size_t *num) +{ + *num = 0; + return NULL; +} +const struct pad_config *__weak variant_early_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(early_gpio_table); + return early_gpio_table; +} +static const struct cros_gpio cros_gpios[] = { + /* TODO */ +}; +const struct cros_gpio *__weak variant_cros_gpios(size_t *num) +{ + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; +} +const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h new file mode 100644 index 0000000..a2210c6 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_EC_H__ +#define __BASEBOARD_EC_H__ + +#include <ec/ec.h> +#include <ec/google/chromeec/ec_commands.h> +#include <baseboard/gpio.h> + +/* TODO: Set the correct values */ +#define MAINBOARD_EC_SCI_EVENTS 0 +#define MAINBOARD_EC_SMI_EVENTS 0 +#define MAINBOARD_EC_S5_WAKE_EVENTS 0 +#define MAINBOARD_EC_S3_WAKE_EVENTS 0 +#define MAINBOARD_EC_S0IX_WAKE_EVENTS 0 +#define MAINBOARD_EC_LOG_EVENTS 0 + +#endif /* __BASEBOARD_EC_H__ */ diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h new file mode 100644 index 0000000..9ca9ee7 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_GPIO_H__ +#define __BASEBOARD_GPIO_H__ + +#include <soc/gpe.h> +#include <soc/gpio.h> + +/* TODO: Set the correct values */ +#define EC_SCI_GPI 0 +#define GPIO_PCH_WP 0 +#define GPIO_EC_IN_RW 0 +#define GPIO_SLP_S0_GATE 0 + +#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/memory.c b/src/mainboard/google/brya/variants/baseboard/trulo/memory.c new file mode 100644 index 0000000..420b366 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/memory.c @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> + +const struct mb_cfg *__weak variant_memory_params(void) +{ + /* TODO */ + return NULL; +} + +bool __weak variant_is_half_populated(void) +{ + /* TODO */ + return false; +} + +void __weak variant_get_spd_info(struct mem_spd *spd_info) +{ + /* TODO */ +}
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Dinesh Gehlot (Code Review)