Change in coreboot[master]: mb/google/zork: Add support for active low wifi power enable
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42938 )
Change subject: mb/google/zork: Add support for active low wifi power enable ......................................................................
mb/google/zork: Add support for active low wifi power enable
A late change went into v3+ of reference schematics which inverted EN_PWR_WIFI to meet PCIe reset/power timings for WiFi device. This is incorporated into v3.51+ for Trembyle reference and v3.2+ for Dalboz reference. However, some variants are built with v3+ reference schematics, but without the inversion of EN_PWR_WIFI polarity. Thus, we need to add support for following combinations: 1. Pre-v3 Schematics 2. V3+ Schematics 3. V3+ Schematics + Active low wifi power
This change adds a new Kconfig `VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW` that sets the minimum board ID that has EN_PWR_WIFI active low in hardware. Variants that missed this change in V3+ integration (berknip and vilboz) have board IDs set to VARIANT_MIN_BOARD_ID_V3_SCHEMATICS + 1. For others, this defaults to VARIANT_MIN_BOARD_ID_V3_SCHEMATICS.
BUG=b:159749536
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ib8da7fba5f4a518a51b203d6a01a9551e261d8b6 --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 3 files changed, 94 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/42938/1
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index a9e9562..885de14 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -141,5 +141,12 @@ default 2 if BOARD_GOOGLE_BERKNIP default 3 if BOARD_GOOGLE_DALBOZ default 2 if BOARD_GOOGLE_VILBOZ + default 256 + +config VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW + int + default 3 if BOARD_GOOGLE_BERKNIP + default 3 if BOARD_GOOGLE_VILBOZ + default VARIANT_MIN_BOARD_ID_V3_SCHEMATICS
endif # BOARD_GOOGLE_BASEBOARD_TREMBYLE || BOARD_GOOGLE_BASEBOARD_DALBOZ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 5f007f7..44bffc2 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -219,20 +219,20 @@ return NULL; }
-static void wifi_power_reset_configure_v3(void) +static void wifi_power_reset_configure_active_low_power(void) { /* * Configure WiFi GPIOs such that: * - WIFI_AUX_RESET is configured first to assert PERST# to WiFi device. - * - Enable power to WiFi using EN_PWR_WIFI. + * - Enable power to WiFi using EN_PWR_WIFI_L. * - Wait for 50ms after power to WiFi is enabled. - * - Deassert PERST# to WiFi device by driving WIFI_AUX_RESET low. + * - Deassert WIFI_AUX_RESET. */ static const struct soc_amd_gpio v3_wifi_table[] = { /* WIFI_AUX_RESET */ PAD_GPO(GPIO_29, HIGH), - /* EN_PWR_WIFI */ - PAD_GPO(GPIO_42, HIGH), + /* EN_PWR_WIFI_L */ + PAD_GPO(GPIO_42, LOW), }; program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
@@ -240,6 +240,41 @@ gpio_set(GPIO_29, 0); }
+static void wifi_power_reset_configure_active_high_power(void) +{ + /* + * When GPIO_42 is configured as active high for enabling WiFi power, WIFI_AUX_RESET + * gets pulled high because of external PU to PP3300_WIFI. Thus, EN_PWR_WIFI needs to be + * set low before driving it high to trigger a WiFi power cycle to meet PCIe + * requirements. Thus, configure GPIOs such that: + * - WIFI_AUX_RESET is configured first to assert PERST# to WiFi device + * - Disable power to WiFi. + * - Wait 10ms for WiFi power to go low. + * - Enable power to WiFi using EN_PWR_WIFI. + * - Deassert WIFI_AUX_RESET. + */ + static const struct soc_amd_gpio v3_wifi_table[] = { + /* WIFI_AUX_RESET */ + PAD_GPO(GPIO_29, HIGH), + /* EN_PWR_WIFI */ + PAD_GPO(GPIO_42, LOW), + }; + program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table)); + + mdelay(10); + gpio_set(GPIO_42, 1); + mdelay(50); + gpio_set(GPIO_29, 0); +} + +static void wifi_power_reset_configure_v3(uint32_t board_version) +{ + if (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW) + wifi_power_reset_configure_active_low_power(); + else + wifi_power_reset_configure_active_high_power(); +} + static void wifi_power_reset_configure_pre_v3(void) { /* @@ -275,7 +310,7 @@
if (!google_chromeec_cbi_get_board_version(&board_version) && (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_V3_SCHEMATICS)) - wifi_power_reset_configure_v3(); + wifi_power_reset_configure_v3(board_version); else wifi_power_reset_configure_pre_v3(); } @@ -285,6 +320,12 @@ PAD_GPO(GPIO_5, LOW), /* PCIE_RST1_L */ PAD_GPO(GPIO_27, LOW), + /* + * On pre-v3 schematics, GPIO_29 is EN_PWR_WIFI. So, setting to high should be no-op. + * On v3+ schematics, GPIO_29 is WIFI_AUX_RESET. Setting to high ensures that PERST# is + * asserted to WiFi device until coreboot reconfigures GPIO_29 on resume path. + */ + PAD_GPO(GPIO_29, HIGH), /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, LOW), /* EN_PWR_CAMERA */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index a395e2e..97ee130 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -214,20 +214,20 @@ return NULL; }
-static void wifi_power_reset_configure_v3(void) +static void wifi_power_reset_configure_active_low_power(void) { /* * Configure WiFi GPIOs such that: * - WIFI_AUX_RESET_L is configured first to assert PERST# to WiFi device. - * - Enable power to WiFi using EN_PWR_WIFI. + * - Enable power to WiFi using EN_PWR_WIFI_L. * - Wait for 50ms after power to WiFi is enabled. * - Deassert WIFI_AUX_RESET_L. */ static const struct soc_amd_gpio v3_wifi_table[] = { /* WIFI_AUX_RESET_L */ PAD_GPO(GPIO_86, LOW), - /* EN_PWR_WIFI */ - PAD_GPO(GPIO_42, HIGH), + /* EN_PWR_WIFI_L */ + PAD_GPO(GPIO_42, LOW), }; program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
@@ -235,6 +235,41 @@ gpio_set(GPIO_86, 1); }
+static void wifi_power_reset_configure_active_high_power(void) +{ + /* + * When GPIO_42 is configured as active high for enabling WiFi power, WIFI_AUX_RESET_L + * gets pulled high because of external PU to PP3300_WIFI. Thus, EN_PWR_WIFI needs to be + * set low before driving it high to trigger a WiFi power cycle to meet PCIe + * requirements. Thus, configura GPIOs such that: + * - WIFI_AUX_RESET_L is configured first to assert PERST# to WiFi device + * - Disable power to WiFi. + * - Wait 10ms for WiFi power to go low. + * - Enable power to WiFi using EN_PWR_WIFI. + * - Deassert WIFI_AUX_RESET_L. + */ + static const struct soc_amd_gpio v3_wifi_table[] = { + /* WIFI_AUX_RESET_L */ + PAD_GPO(GPIO_86, LOW), + /* EN_PWR_WIFI */ + PAD_GPO(GPIO_42, LOW), + }; + program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table)); + + mdelay(10); + gpio_set(GPIO_42, 1); + mdelay(50); + gpio_set(GPIO_86, 1); +} + +static void wifi_power_reset_configure_v3(uint32_t board_version) +{ + if (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW) + wifi_power_reset_configure_active_low_power(); + else + wifi_power_reset_configure_active_high_power(); +} + static void wifi_power_reset_configure_pre_v3(void) { /* @@ -267,7 +302,7 @@
if (!google_chromeec_cbi_get_board_version(&board_version) && (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_V3_SCHEMATICS)) - wifi_power_reset_configure_v3(); + wifi_power_reset_configure_v3(board_version); else wifi_power_reset_configure_pre_v3(); }
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42938 )
Change subject: mb/google/zork: Add support for active low wifi power enable ......................................................................
Patch Set 1: Code-Review+1
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42938 )
Change subject: mb/google/zork: Add support for active low wifi power enable ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42938 )
Change subject: mb/google/zork: Add support for active low wifi power enable ......................................................................
mb/google/zork: Add support for active low wifi power enable
A late change went into v3+ of reference schematics which inverted EN_PWR_WIFI to meet PCIe reset/power timings for WiFi device. This is incorporated into v3.51+ for Trembyle reference and v3.2+ for Dalboz reference. However, some variants are built with v3+ reference schematics, but without the inversion of EN_PWR_WIFI polarity. Thus, we need to add support for following combinations: 1. Pre-v3 Schematics 2. V3+ Schematics 3. V3+ Schematics + Active low wifi power
This change adds a new Kconfig `VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW` that sets the minimum board ID that has EN_PWR_WIFI active low in hardware. Variants that missed this change in V3+ integration (berknip and vilboz) have board IDs set to VARIANT_MIN_BOARD_ID_V3_SCHEMATICS + 1. For others, this defaults to VARIANT_MIN_BOARD_ID_V3_SCHEMATICS.
BUG=b:159749536
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ib8da7fba5f4a518a51b203d6a01a9551e261d8b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42938 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 3 files changed, 94 insertions(+), 11 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Aaron Durbin: Looks good to me, approved
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index a9e9562..885de14 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -141,5 +141,12 @@ default 2 if BOARD_GOOGLE_BERKNIP default 3 if BOARD_GOOGLE_DALBOZ default 2 if BOARD_GOOGLE_VILBOZ + default 256 + +config VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW + int + default 3 if BOARD_GOOGLE_BERKNIP + default 3 if BOARD_GOOGLE_VILBOZ + default VARIANT_MIN_BOARD_ID_V3_SCHEMATICS
endif # BOARD_GOOGLE_BASEBOARD_TREMBYLE || BOARD_GOOGLE_BASEBOARD_DALBOZ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index d6d463a..711a94c 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -217,20 +217,20 @@ return NULL; }
-static void wifi_power_reset_configure_v3(void) +static void wifi_power_reset_configure_active_low_power(void) { /* * Configure WiFi GPIOs such that: * - WIFI_AUX_RESET is configured first to assert PERST# to WiFi device. - * - Enable power to WiFi using EN_PWR_WIFI. + * - Enable power to WiFi using EN_PWR_WIFI_L. * - Wait for 50ms after power to WiFi is enabled. - * - Deassert PERST# to WiFi device by driving WIFI_AUX_RESET low. + * - Deassert WIFI_AUX_RESET. */ static const struct soc_amd_gpio v3_wifi_table[] = { /* WIFI_AUX_RESET */ PAD_GPO(GPIO_29, HIGH), - /* EN_PWR_WIFI */ - PAD_GPO(GPIO_42, HIGH), + /* EN_PWR_WIFI_L */ + PAD_GPO(GPIO_42, LOW), }; program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
@@ -238,6 +238,41 @@ gpio_set(GPIO_29, 0); }
+static void wifi_power_reset_configure_active_high_power(void) +{ + /* + * When GPIO_42 is configured as active high for enabling WiFi power, WIFI_AUX_RESET + * gets pulled high because of external PU to PP3300_WIFI. Thus, EN_PWR_WIFI needs to be + * set low before driving it high to trigger a WiFi power cycle to meet PCIe + * requirements. Thus, configure GPIOs such that: + * - WIFI_AUX_RESET is configured first to assert PERST# to WiFi device + * - Disable power to WiFi. + * - Wait 10ms for WiFi power to go low. + * - Enable power to WiFi using EN_PWR_WIFI. + * - Deassert WIFI_AUX_RESET. + */ + static const struct soc_amd_gpio v3_wifi_table[] = { + /* WIFI_AUX_RESET */ + PAD_GPO(GPIO_29, HIGH), + /* EN_PWR_WIFI */ + PAD_GPO(GPIO_42, LOW), + }; + program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table)); + + mdelay(10); + gpio_set(GPIO_42, 1); + mdelay(50); + gpio_set(GPIO_29, 0); +} + +static void wifi_power_reset_configure_v3(uint32_t board_version) +{ + if (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW) + wifi_power_reset_configure_active_low_power(); + else + wifi_power_reset_configure_active_high_power(); +} + static void wifi_power_reset_configure_pre_v3(void) { /* @@ -273,7 +308,7 @@
if (!google_chromeec_cbi_get_board_version(&board_version) && (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_V3_SCHEMATICS)) - wifi_power_reset_configure_v3(); + wifi_power_reset_configure_v3(board_version); else wifi_power_reset_configure_pre_v3(); } @@ -283,6 +318,12 @@ PAD_GPO(GPIO_5, LOW), /* PCIE_RST1_L */ PAD_GPO(GPIO_27, LOW), + /* + * On pre-v3 schematics, GPIO_29 is EN_PWR_WIFI. So, setting to high should be no-op. + * On v3+ schematics, GPIO_29 is WIFI_AUX_RESET. Setting to high ensures that PERST# is + * asserted to WiFi device until coreboot reconfigures GPIO_29 on resume path. + */ + PAD_GPO(GPIO_29, HIGH), /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, LOW), /* EN_PWR_CAMERA */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index c9ad96b..835cf99 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -211,20 +211,20 @@ return NULL; }
-static void wifi_power_reset_configure_v3(void) +static void wifi_power_reset_configure_active_low_power(void) { /* * Configure WiFi GPIOs such that: * - WIFI_AUX_RESET_L is configured first to assert PERST# to WiFi device. - * - Enable power to WiFi using EN_PWR_WIFI. + * - Enable power to WiFi using EN_PWR_WIFI_L. * - Wait for 50ms after power to WiFi is enabled. * - Deassert WIFI_AUX_RESET_L. */ static const struct soc_amd_gpio v3_wifi_table[] = { /* WIFI_AUX_RESET_L */ PAD_GPO(GPIO_86, LOW), - /* EN_PWR_WIFI */ - PAD_GPO(GPIO_42, HIGH), + /* EN_PWR_WIFI_L */ + PAD_GPO(GPIO_42, LOW), }; program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
@@ -232,6 +232,41 @@ gpio_set(GPIO_86, 1); }
+static void wifi_power_reset_configure_active_high_power(void) +{ + /* + * When GPIO_42 is configured as active high for enabling WiFi power, WIFI_AUX_RESET_L + * gets pulled high because of external PU to PP3300_WIFI. Thus, EN_PWR_WIFI needs to be + * set low before driving it high to trigger a WiFi power cycle to meet PCIe + * requirements. Thus, configura GPIOs such that: + * - WIFI_AUX_RESET_L is configured first to assert PERST# to WiFi device + * - Disable power to WiFi. + * - Wait 10ms for WiFi power to go low. + * - Enable power to WiFi using EN_PWR_WIFI. + * - Deassert WIFI_AUX_RESET_L. + */ + static const struct soc_amd_gpio v3_wifi_table[] = { + /* WIFI_AUX_RESET_L */ + PAD_GPO(GPIO_86, LOW), + /* EN_PWR_WIFI */ + PAD_GPO(GPIO_42, LOW), + }; + program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table)); + + mdelay(10); + gpio_set(GPIO_42, 1); + mdelay(50); + gpio_set(GPIO_86, 1); +} + +static void wifi_power_reset_configure_v3(uint32_t board_version) +{ + if (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_WIFI_POWER_ACTIVE_LOW) + wifi_power_reset_configure_active_low_power(); + else + wifi_power_reset_configure_active_high_power(); +} + static void wifi_power_reset_configure_pre_v3(void) { /* @@ -264,7 +299,7 @@
if (!google_chromeec_cbi_get_board_version(&board_version) && (board_version >= CONFIG_VARIANT_MIN_BOARD_ID_V3_SCHEMATICS)) - wifi_power_reset_configure_v3(); + wifi_power_reset_configure_v3(board_version); else wifi_power_reset_configure_pre_v3(); }
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)
-
Paul Menzel (Code Review)