Change in coreboot[master]: soc/intel/alderlake: Add support to update CSE descriptor at runtime

[Reka Norman (Code Review)]

Reka Norman has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63365 )

Change subject: soc/intel/alderlake: Add support to update CSE descriptor at runtime
......................................................................

soc/intel/alderlake: Add support to update CSE descriptor at runtime

On nereid, we need to update the CSE descriptor based on fw_config (see
the following patch), so add support to update the descriptor at
runtime. This is a temporary workaround while we find a better solution.

This is basically adding back the configure_pmc_descriptor() function
removed in CB:63339, just making it generic.

BUG=b:226848617
TEST=With the following patch, Type-C and HDMI work on nereid.

Change-Id: I43c4d2888706561e42ff6b8ce0377eedbc38dbfe
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/Makefile.inc
A src/soc/intel/alderlake/bootblock/cse_descriptor.c
M src/soc/intel/alderlake/include/soc/bootblock.h
4 files changed, 91 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/63365/1

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index eed157a..03b8160 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -112,6 +112,13 @@
    select UDK_202005_BINDING
    select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM

+config ALDERLAKE_CONFIGURE_CSE_DESCRIPTOR
+	bool
+	help
+	  Select this if the CSE descriptor needs to be updated at runtime. This
+	  can only be done if the descriptor region is writable, and should only
+	  be used as a temporary workaround.
+
 config ALDERLAKE_CAR_ENHANCED_NEM
    bool
    default y if !INTEL_CAR_NEM
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index d2c48b7..bd0bba6 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -16,6 +16,7 @@
 bootblock-y += espi.c
 bootblock-y += gpio.c
 bootblock-y += p2sb.c
+bootblock-$(CONFIG_ALDERLAKE_CONFIGURE_CSE_DESCRIPTOR) += bootblock/cse_descriptor.c

romstage-y += espi.c
 romstage-y += gpio.c
diff --git a/src/soc/intel/alderlake/bootblock/cse_descriptor.c b/src/soc/intel/alderlake/bootblock/cse_descriptor.c
new file mode 100644
index 0000000..8b6550d
--- /dev/null
+++ b/src/soc/intel/alderlake/bootblock/cse_descriptor.c
@@ -0,0 +1,82 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <arch/cpu.h>
+#include <arch/mmio.h>
+#include <cf9_reset.h>
+#include <commonlib/region.h>
+#include <console/console.h>
+#include <cpu/intel/cpu_ids.h>
+#include <fmap.h>
+#include <intelblocks/pmclib.h>
+#include <soc/bootblock.h>
+#include <types.h>
+
+/* Flash Master 1 : HOST/BIOS */
+#define FLMSTR1			0x80
+
+/* Flash signature Offset */
+#define FLASH_SIGN_OFFSET	0x10
+#define FLMSTR_WR_SHIFT_V2	20
+#define FLASH_VAL_SIGN		0xFF0A55A
+
+/* It checks whether host(Flash Master 1) has write access to the Descriptor Region or not */
+static int is_descriptor_writeable(uint8_t *desc)
+{
+	/* Check flash has valid signature */
+	if (read32((void *)(desc + FLASH_SIGN_OFFSET)) != FLASH_VAL_SIGN) {
+		printk(BIOS_DEBUG, "Flash Descriptor is not valid\n");
+		return 0;
+	}
+
+	/* Check host has write access to the Descriptor Region */
+	if (!((read32((void *)(desc + FLMSTR1)) >> FLMSTR_WR_SHIFT_V2) & BIT(0))) {
+		printk(BIOS_DEBUG, "Host doesn't have write access to Descriptor Region\n");
+		return 0;
+	}
+
+	return 1;
+}
+
+void configure_cse_descriptor(size_t byte, uint8_t desired_value) {
+	uint8_t si_desc_buf[CONFIG_SI_DESC_REGION_SZ];
+	struct region_device desc_rdev;
+
+	if (fmap_locate_area_as_rdev_rw(CONFIG_SI_DESC_REGION, &desc_rdev) < 0) {
+		printk(BIOS_ERR, "Failed to locate %s in the FMAP\n", CONFIG_SI_DESC_REGION);
+		return;
+	}
+
+	if (rdev_readat(&desc_rdev, si_desc_buf, 0, CONFIG_SI_DESC_REGION_SZ) !=
+			CONFIG_SI_DESC_REGION_SZ) {
+		printk(BIOS_ERR, "Failed to read Descriptor Region from SPI Flash\n");
+		return;
+	}
+
+	if (!is_descriptor_writeable(si_desc_buf))
+		return;
+
+	printk(BIOS_DEBUG, "Current value of Descriptor byte 0x%lx: 0x%x\n", byte, si_desc_buf[byte]);
+	if (si_desc_buf[byte] == desired_value) {
+		printk(BIOS_DEBUG, "Update of Descriptor is not required!\n");
+		return;
+	}
+
+	si_desc_buf[byte] = desired_value;
+
+	if (rdev_eraseat(&desc_rdev, 0, CONFIG_SI_DESC_REGION_SZ) != CONFIG_SI_DESC_REGION_SZ) {
+		printk(BIOS_ERR, "Failed to erase Descriptor Region area\n");
+		return;
+	}
+
+	if (rdev_writeat(&desc_rdev, si_desc_buf, 0, CONFIG_SI_DESC_REGION_SZ)
+			!= CONFIG_SI_DESC_REGION_SZ) {
+		printk(BIOS_ERR, "Failed to update Descriptor Region\n");
+		return;
+	}
+
+	printk(BIOS_DEBUG, "Update of Descriptor successful, trigger GLOBAL RESET\n");
+
+	pmc_global_reset_enable(true);
+	do_full_reset();
+	die("Failed to trigger GLOBAL RESET\n");
+}
diff --git a/src/soc/intel/alderlake/include/soc/bootblock.h b/src/soc/intel/alderlake/include/soc/bootblock.h
index e989bdd..54467fa 100644
--- a/src/soc/intel/alderlake/include/soc/bootblock.h
+++ b/src/soc/intel/alderlake/include/soc/bootblock.h
@@ -17,6 +17,6 @@
 void pch_early_iorange_init(void);
 void report_platform_info(void);

-void configure_pmc_descriptor(void);
+void configure_cse_descriptor(size_t byte, uint8_t desired_value);

#endif