[S] Change in coreboot[main]: sb/intel/bd82x6x: assign PCH XHCI controller ops in chipset devicetree

[Felix Held (Code Review)]

Attention is currently required from: Angel Pons.

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79170?usp=email )

Change subject: sb/intel/bd82x6x: assign PCH XHCI controller ops in chipset devicetree
......................................................................

sb/intel/bd82x6x: assign PCH XHCI controller ops in chipset devicetree

Since the XHCI controller in the PCH is always on the same device
function, the device operations can be statically assigned in the
devicetree and there's no need to bind the XHCI device operations to the
PCI device during runtime via a list of PCI IDs.

Signed-off-by: Felix Held 
Change-Id: I8685bec734415346a53330c9bd1aa82986995f1a
---
M src/northbridge/intel/sandybridge/chipset.cb
M src/southbridge/intel/bd82x6x/usb_xhci.c
2 files changed, 2 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/79170/1

diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb
index 29e9d7f..39d63c6 100644
--- a/src/northbridge/intel/sandybridge/chipset.cb
+++ b/src/northbridge/intel/sandybridge/chipset.cb
@@ -19,7 +19,7 @@
    	device pci 06.0 alias peg60 off ops sandybridge_nb_pcie_rp_ops end # PEG60

chip southbridge/intel/bd82x6x # Intel Series 6/7 PCH
-			device pci 14.0 alias xhci off end       # USB 3.0 Controller (only on 7 series)
+			device pci 14.0 alias xhci off ops bd82x6x_usb_xhci_ops end # XHCI Controller only on 7 series
    		device pci 16.0 alias mei1 on end        # Management Engine Interface 1
    		device pci 16.1 alias mei2 off end       # Management Engine Interface 2
    		device pci 16.2 alias me_ide_r off end   # Management Engine IDE-R
diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index 5607b16..f71a505 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -41,7 +41,7 @@
    return "XHC";
 }

-static struct device_operations usb_xhci_ops = {
+struct device_operations bd82x6x_usb_xhci_ops = {
    .read_resources		= pci_dev_read_resources,
    .set_resources		= pci_dev_set_resources,
    .enable_resources	= pci_dev_enable_resources,
@@ -49,11 +49,3 @@
    .ops_pci		= &pci_dev_ops_pci,
    .acpi_name		= xhci_acpi_name,
 };
-
-static const unsigned short pci_device_ids[] = { 0x1e31, 0 };
-
-static const struct pci_driver pch_usb_xhci __pci_driver = {
-	.ops	 = &usb_xhci_ops,
-	.vendor	 = PCI_VID_INTEL,
-	.devices = pci_device_ids,
-};