[S] Change in coreboot[main]: sb/intel/bd82x6x: Improve SLCAP

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Patrick Rudolph.

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78228?usp=email )

Change subject: sb/intel/bd82x6x: Improve SLCAP
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Patch Set 2:

(1 comment)

File src/southbridge/intel/bd82x6x/pcie.c:

https://review.coreboot.org/c/coreboot/+/78228/comment/e693f3c2_d70ea601 :
PS2, Line 152: 	reg32 |= (slot_number++ << 19);
For now, maybe pre-increment, such that the first assignment is 1, to make a distinction from all the SLTCAP registers in the same chassis that do not get programmed at all. That would be the case for any nested bridge or switch devices?

My understanding is that slot_number has no functional purpose other than it could match a label visually present in the chassis.

This made me consider, if we should evaluate the SI Slot Implemented flag first here, my interpretation is PCI_EXP_SLTCAP should be ignored if SI bit is not set.

I found out that the couple Intel datasheets I looked at actually have the SI bit as R/WO with default of 1.