Change in coreboot[master]: nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY ......................................................................
nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY
The MRC will perform PCI enumeration, and if it detects a VGA device in a PEG slot, it will disable the IGD and not reserve any memory for it. Since the memory map is locked by the time MRC finishes, the IGD can't be enabled afterwards. Wonderful.
If we are supposed to enable the onboard VGA as primary, hide all PEG devices during MRC execution. This will trick the MRC into thinking there aren't any, and will enable the IGD. Note that PEG AFE settings will not be programmed, which may cause stability problems at higher PCIe link speeds. The most ideal way to fix this problem for good is to implement native init.
Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/early_init.c 1 file changed, 17 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45534/1
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c index 9db6a9d..d3d511e 100644 --- a/src/northbridge/intel/haswell/early_init.c +++ b/src/northbridge/intel/haswell/early_init.c @@ -84,13 +84,24 @@ printk(BIOS_DEBUG, "Started PEG1%d link training.\n", PCI_FUNC(PCI_DEV2DEVFN(dev)));
/* - * Hide the PEG device while the MRC runs. This is because the MRC makes - * configurations that are not ideal if it sees a VGA device in a PEG slot, - * and it locks registers preventing changes to these configurations. + * The MRC will perform PCI enumeration, and if it detects a VGA + * device in a PEG slot, it will disable the IGD and not reserve + * any memory for it. Since the memory map is locked by the time + * MRC finishes, the IGD can't be enabled afterwards. Wonderful. + * + * If we are supposed to enable the onboard VGA as primary, hide + * all PEG devices during MRC execution. This will trick the MRC + * into thinking there aren't any, and will enable the IGD. Note + * that PEG AFE settings will not be programmed, which may cause + * stability problems at higher PCIe link speeds. The most ideal + * way to fix this problem for good is to implement native init. */ - pci_update_config32(HOST_BRIDGE, DEVEN, ~mask, 0); - peg_hidden[PCI_FUNC(PCI_DEV2DEVFN(dev))] = true; - printk(BIOS_DEBUG, "Temporarily hiding PEG1%d.\n", PCI_FUNC(PCI_DEV2DEVFN(dev))); + if (CONFIG(ONBOARD_VGA_IS_PRIMARY)) { + pci_update_config32(HOST_BRIDGE, DEVEN, ~mask, 0); + peg_hidden[PCI_FUNC(PCI_DEV2DEVFN(dev))] = true; + printk(BIOS_DEBUG, "Temporarily hiding PEG1%d.\n", + PCI_FUNC(PCI_DEV2DEVFN(dev))); + } }
void haswell_unhide_peg(void)
Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45534
to look at the new patch set (#4).
Change subject: nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY ......................................................................
nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY
The MRC will perform PCI enumeration, and if it detects a VGA device in a PEG slot, it will disable the IGD and not reserve any memory for it. Since the memory map is locked by the time MRC finishes, the IGD can not be enabled afterwards. Changing this behavior requires patching the MRC.
Hiding the PEG devices from MRC allows the IGD to be used even when a dedicated graphics card is present. However, MRC will not program the PEG AFE settings as it should, which can cause stability problems at higher PCIe link speeds. Thus, restrict this workaround to only run when the ONBOARD_VGA_IS_PRIMARY option is enabled. This allows the IGD to be disabled and the PEG AFE settings to be programmed when a dedicated graphics card is to be enabled, which results in increased stability.
The most ideal way to fix this problem for good is to implement native platform init. Native init is necessary to make Nvidia Optimus usable.
Tested on Asrock B85M Pro4, using the PEG slot with a dedicated graphics card as well as without. Graphics in both situations function properly.
Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/early_init.c 1 file changed, 17 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45534/4
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY ......................................................................
Patch Set 5: Code-Review-1
ONBOARD_VGA_IS_PRIMARY is meant literally. It's about onboard chips, no matter if integrated somewhere or a discrete one. So it can also be on PEG. There is no Kconfig yet for integrated vs. discrete, AFAIK. That area needs to be cleaned up before we can further build on it.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Only hide PEG devices if ONBOARD_VGA_IS_PRIMARY ......................................................................
Patch Set 5:
Patch Set 5: Code-Review-1
ONBOARD_VGA_IS_PRIMARY is meant literally. It's about onboard chips, no matter if integrated somewhere or a discrete one. So it can also be on PEG. There is no Kconfig yet for integrated vs. discrete, AFAIK. That area needs to be cleaned up before we can further build on it.
The only Haswell mainboard in the tree for which this is true is the Supermicro X10SLM-F, and the IGD is disabled on that one. I'll just add a new Kconfig option.
Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45534
to look at the new patch set (#6).
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option
The MRC will perform PCI enumeration, and if it detects a VGA device in a PEG slot, it will disable the IGD and not reserve any memory for it. Since the memory map is locked by the time MRC finishes, the IGD can not be enabled afterwards. Changing this behavior requires patching the MRC.
Hiding the PEG devices from MRC allows the IGD to be used even when a dedicated graphics card is present. However, MRC will not program the PEG AFE settings as it should, which can cause stability problems at higher PCIe link speeds. Thus, restrict this workaround to only run when the HASWELL_HIDE_PEG_FROM_MRC option is enabled. This allows the IGD to be disabled and the PEG AFE settings to be programmed when a dedicated graphics card is to be enabled, which results in increased stability.
The most ideal way to fix this problem for good is to implement native platform init. Native init is necessary to make Nvidia Optimus usable.
Tested on Asrock B85M Pro4, using the PEG slot with a dedicated graphics card as well as without. Graphics in both situations function properly.
Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/haswell/early_init.c 2 files changed, 26 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45534/6
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 6:
Patch Set 5:
Patch Set 5: Code-Review-1
ONBOARD_VGA_IS_PRIMARY is meant literally. It's about onboard chips, no matter if integrated somewhere or a discrete one. So it can also be on PEG. There is no Kconfig yet for integrated vs. discrete, AFAIK. That area needs to be cleaned up before we can further build on it.
The only Haswell mainboard in the tree for which this is true is the Supermicro X10SLM-F, and the IGD is disabled on that one. I'll just add a new Kconfig option.
Done
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 6: Code-Review+1
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 6: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/45534/6/src/northbridge/intel/haswe... File src/northbridge/intel/haswell/Kconfig:
https://review.coreboot.org/c/coreboot/+/45534/6/src/northbridge/intel/haswe... PS6, Line 83: default n I'm not sure, but this might break default configs for instance for the T440p with dGPU. Unless the dGPU is powered off by default.
Should we override the default for existing mobile boards, maybe?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45534/6/src/northbridge/intel/haswe... File src/northbridge/intel/haswell/Kconfig:
https://review.coreboot.org/c/coreboot/+/45534/6/src/northbridge/intel/haswe... PS6, Line 83: default n
I'm not sure, but this might break default configs for instance for the […]
I'll just flip the default.
Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45534
to look at the new patch set (#8).
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option
The MRC will perform PCI enumeration, and if it detects a VGA device in a PEG slot, it will disable the IGD and not reserve any memory for it. Since the memory map is locked by the time MRC finishes, the IGD can not be enabled afterwards. Changing this behavior requires patching the MRC.
Hiding the PEG devices from MRC allows the IGD to be used even when a dedicated graphics card is present. However, MRC will not program the PEG AFE settings as it should, which can cause stability problems at higher PCIe link speeds. Thus, restrict this workaround to only run when the HASWELL_HIDE_PEG_FROM_MRC option is enabled. This allows the IGD to be disabled and the PEG AFE settings to be programmed when a dedicated graphics card is to be enabled, which results in increased stability.
The most ideal way to fix this problem for good is to implement native platform init. Native init is necessary to make Nvidia Optimus usable.
Tested on Asrock B85M Pro4, using the PEG slot with a dedicated graphics card as well as without. Graphics in both situations function properly.
Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/haswell/early_init.c 2 files changed, 26 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45534/8
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45534/6/src/northbridge/intel/haswe... File src/northbridge/intel/haswell/Kconfig:
https://review.coreboot.org/c/coreboot/+/45534/6/src/northbridge/intel/haswe... PS6, Line 83: default n
I'll just flip the default.
Done
Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45534
to look at the new patch set (#9).
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option
The MRC will perform PCI enumeration, and if it detects a VGA device in a PEG slot, it will disable the IGD and not reserve any memory for it. Since the memory map is locked by the time MRC finishes, the IGD can not be enabled afterwards. Changing this behavior requires patching the MRC.
Hiding the PEG devices from MRC allows the IGD to be used even when a dedicated graphics card is present. However, MRC will not program the PEG AFE settings as it should, which can cause stability problems at higher PCIe link speeds. Thus, restrict this workaround to only run when the HASWELL_HIDE_PEG_FROM_MRC option is enabled. This allows the IGD to be disabled and the PEG AFE settings to be programmed when a dedicated graphics card is to be enabled, which results in increased stability.
The most ideal way to fix this problem for good is to implement native platform init. Native init is necessary to make Nvidia Optimus usable.
Tested on Asrock B85M Pro4, using the PEG slot with a dedicated graphics card as well as without. Graphics in both situations function properly.
Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/haswell/early_init.c 2 files changed, 26 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45534/9
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 9: Code-Review+1
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
Patch Set 9: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45534 )
Change subject: nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option ......................................................................
nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option
The MRC will perform PCI enumeration, and if it detects a VGA device in a PEG slot, it will disable the IGD and not reserve any memory for it. Since the memory map is locked by the time MRC finishes, the IGD can not be enabled afterwards. Changing this behavior requires patching the MRC.
Hiding the PEG devices from MRC allows the IGD to be used even when a dedicated graphics card is present. However, MRC will not program the PEG AFE settings as it should, which can cause stability problems at higher PCIe link speeds. Thus, restrict this workaround to only run when the HASWELL_HIDE_PEG_FROM_MRC option is enabled. This allows the IGD to be disabled and the PEG AFE settings to be programmed when a dedicated graphics card is to be enabled, which results in increased stability.
The most ideal way to fix this problem for good is to implement native platform init. Native init is necessary to make Nvidia Optimus usable.
Tested on Asrock B85M Pro4, using the PEG slot with a dedicated graphics card as well as without. Graphics in both situations function properly.
Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45534 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/haswell/early_init.c 2 files changed, 26 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 84be33d..04ab373 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -78,6 +78,15 @@ The path and filename of the file to use as System Agent binary.
+config HASWELL_HIDE_PEG_FROM_MRC + bool "Hide PEG devices from MRC to work around hardcoded MRC behavior" + default y + help + If set, hides all PEG devices from MRC. This allows the iGPU + to be used even when a dedicated graphics card is present. + However, it prevents MRC from programming PEG AFE registers, + which can make PEG devices unstable. When unsure, choose N. + config PRE_GRAPHICS_DELAY int "Graphics initialization delay in ms" default 0 diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c index 9db6a9d..79cc277 100644 --- a/src/northbridge/intel/haswell/early_init.c +++ b/src/northbridge/intel/haswell/early_init.c @@ -84,13 +84,24 @@ printk(BIOS_DEBUG, "Started PEG1%d link training.\n", PCI_FUNC(PCI_DEV2DEVFN(dev)));
/* - * Hide the PEG device while the MRC runs. This is because the MRC makes - * configurations that are not ideal if it sees a VGA device in a PEG slot, - * and it locks registers preventing changes to these configurations. + * The MRC will perform PCI enumeration, and if it detects a VGA + * device in a PEG slot, it will disable the IGD and not reserve + * any memory for it. Since the memory map is locked by the time + * MRC finishes, the IGD can't be enabled afterwards. Wonderful. + * + * If one really wants to enable the Intel iGPU as primary, hide + * all PEG devices during MRC execution. This will trick the MRC + * into thinking there aren't any, and will enable the IGD. Note + * that PEG AFE settings will not be programmed, which may cause + * stability problems at higher PCIe link speeds. The most ideal + * way to fix this problem for good is to implement native init. */ - pci_update_config32(HOST_BRIDGE, DEVEN, ~mask, 0); - peg_hidden[PCI_FUNC(PCI_DEV2DEVFN(dev))] = true; - printk(BIOS_DEBUG, "Temporarily hiding PEG1%d.\n", PCI_FUNC(PCI_DEV2DEVFN(dev))); + if (CONFIG(HASWELL_HIDE_PEG_FROM_MRC)) { + pci_update_config32(HOST_BRIDGE, DEVEN, ~mask, 0); + peg_hidden[PCI_FUNC(PCI_DEV2DEVFN(dev))] = true; + printk(BIOS_DEBUG, "Temporarily hiding PEG1%d.\n", + PCI_FUNC(PCI_DEV2DEVFN(dev))); + } }
void haswell_unhide_peg(void)
-
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