[S] Change in coreboot[main]: mb/google/brya/var/trulo: Add CNVi descriptions

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83551?usp=email )

Change subject: mb/google/brya/var/trulo: Add CNVi descriptions
......................................................................

mb/google/brya/var/trulo: Add CNVi descriptions

This patch adds descriptions for CNVi WiFi and BT device to the device
tree.

BUG=b:351976770
TEST=Builds successfully for google/trulo.

Change-Id: I7396917ca7875dcbe1d35a371cc450a9e070b18d
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83551
Tested-by: build bot (Jenkins) 
Reviewed-by: Eric Lai 
---
M src/mainboard/google/brya/variants/trulo/overridetree.cb
1 file changed, 11 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Eric Lai: Looks good to me, approved

diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index febc1de..d603c137 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -8,6 +8,9 @@
    # S0ix enable
    register "s0ix_enable" = "1"

+	# Enable CNVi BT
+	register "cnvi_bt_core" = "true"
+
    register "usb2_ports[0]" = "USB2_PORT_MID(OC1)"         # USB2_A0(MLB)
    register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"     # USB2_A1 (DB)
    register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"     # M.2 Camera
@@ -154,6 +157,14 @@
    		end
    	end
    	device ref shared_sram on end
+		device ref cnvi_wifi on
+			chip drivers/wifi/generic
+				register "wake" = "GPE0_PME_B0"
+				register "enable_cnvi_ddr_rfim" = "true"
+				register "add_acpi_dma_property" = "true"
+				device generic 0 on end
+			end
+		end
    	device ref i2c0 on
    		chip drivers/i2c/tpm
    			register "hid" = ""GOOG0005""