Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32278
Change subject: mb/google/hatch: Skip UART0 config in FSP ......................................................................
mb/google/hatch: Skip UART0 config in FSP
UART0 is already configured in coreboot, so this change sets SerialIo config for UART0 to PchSerialIoSkipInit to skip initialization in FSP.
BUG=b:130325418
Change-Id: Ifc88f4fa11bff2144417d5194776c15f9f7b60ac Signed-off-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/hatch/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/32278/1
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index bdc0256..5492379 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -10,7 +10,7 @@ [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, - [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32278 )
Change subject: mb/google/hatch: Skip UART0 config in FSP ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32278 )
Change subject: mb/google/hatch: Skip UART0 config in FSP ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/32278/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32278/1//COMMIT_MSG@11 PS1, Line 11: Does this decrease the boot time?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32278 )
Change subject: mb/google/hatch: Skip UART0 config in FSP ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/32278/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32278/1//COMMIT_MSG@11 PS1, Line 11:
Does this decrease the boot time?
I don't think there is going to be any boot time benefit. Currently, we are seeing an issue where UART console stops working if FSP tries to re-initialize it.
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32278 )
Change subject: mb/google/hatch: Skip UART0 config in FSP ......................................................................
Patch Set 1: Code-Review+2
This is working on Hatch CML now.
Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32278 )
Change subject: mb/google/hatch: Skip UART0 config in FSP ......................................................................
mb/google/hatch: Skip UART0 config in FSP
UART0 is already configured in coreboot, so this change sets SerialIo config for UART0 to PchSerialIoSkipInit to skip initialization in FSP.
BUG=b:130325418
Change-Id: Ifc88f4fa11bff2144417d5194776c15f9f7b60ac Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32278 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Shelley Chen shchen@google.com --- M src/mainboard/google/hatch/variants/hatch/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved Shelley Chen: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 28644d1..b9ec1dd 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -10,7 +10,7 @@ [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, - [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
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Furquan Shaikh (Code Review) -
Paul Menzel (Code Review)
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Shelley Chen (Code Review)
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Subrata Banik (Code Review)