Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
mb/google/zork: update DRAM SPD table for dirinboz
DRAM support list 0x00 HYNIX HMA851S6CJR6N-VK 0x01 HYNIX H5ANAG6NCMR-VKC 0x02 Samsung K4A8G165WC-BCTD 0x03 Samsung K4AAG165WB-MCTD 0x04 Samsung K4A8G165WC-BCWE 0x05 HYNIX H5AN8G6NDJR-XNC 0x06 HYNIX H5ANAG6NCMR-XNC 0x07 Micron MT40A512M16TB-062E:J 0x08 Micron MT40A1G16KD-062E:E 0x09 Samsung K4AAG165WA-BCTD 0x0A Samsung K4AAG165WA-BCWE
BUG=b:161579679 BRANCH=master TEST=build
Change-Id: Ib9fa5ae98568d659326d431a4006174a343fa299 Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com --- A src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/43991/1
diff --git a/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc b/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc new file mode 100644 index 0000000..480e757 --- /dev/null +++ b/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Ordered List of APCB entries, up to 16. +# Entries should match this pattern {NAME}_x{1,2} +# There should be a matching SPD hex file in SPD_SOURCES_DIR +# matching the pattern {NAME}.spd.hex +# The _x{1,2} suffix denotes single or dual channel +# Alternatively, generated APCBs stored at +# 3rdparty/blobs/mainboard/$(MAINBOARDDIR)/APCB_{NAME}.bin will be included. +APCB_SOURCES = hynix-HMA851S6CJR6N-VK_x1 # 0b0000 +APCB_SOURCES += hynix-H5ANAG6NCMR-VKC_x1 # 0b0001 +APCB_SOURCES += samsung-K4A8G165WC-BCTD_x1 # 0b0010 +APCB_SOURCES += samsung-K4AAG165WB-MCTD_x1 # 0b0011 +APCB_SOURCES += samsung-K4A8G165WC-BCWE_x1 # 0b0100 +APCB_SOURCES += hynix-H5AN8G6NDJR-XNC_x1 # 0b0101 +APCB_SOURCES += hynix-H5ANAG6NCMR-XNC_x1 # 0b0110 +APCB_SOURCES += micron-MT40A512M16TB-062E-J_x1 # 0b0111 +APCB_SOURCES += micron-MT40A1G16KD-062E-E_x1 # 0b1000 +APCB_SOURCES += samsung-K4AAG165WA-BCTD_x1 # 0b1001 +APCB_SOURCES += samsung-K4AAG165WA-BCWE_x1 # 0b1010 +APCB_SOURCES += empty # 0b1011 +APCB_SOURCES += empty # 0b1100 +APCB_SOURCES += empty # 0b1101 +APCB_SOURCES += empty # 0b1110 +APCB_SOURCES += empty # 0b1111
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
Patch Set 1:
This seems like a huge list. Are all of these really needed?
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
Patch Set 1:
Patch Set 1:
This seems like a huge list. Are all of these really needed?
Hi Martin, yes, we'll have several SKUs that will be built with these DRAM. thanks.
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
Patch Set 1:
hi reviewers, could we have this one merged? thank you!
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
mb/google/zork: update DRAM SPD table for dirinboz
DRAM support list 0x00 HYNIX HMA851S6CJR6N-VK 0x01 HYNIX H5ANAG6NCMR-VKC 0x02 Samsung K4A8G165WC-BCTD 0x03 Samsung K4AAG165WB-MCTD 0x04 Samsung K4A8G165WC-BCWE 0x05 HYNIX H5AN8G6NDJR-XNC 0x06 HYNIX H5ANAG6NCMR-XNC 0x07 Micron MT40A512M16TB-062E:J 0x08 Micron MT40A1G16KD-062E:E 0x09 Samsung K4AAG165WA-BCTD 0x0A Samsung K4AAG165WA-BCWE
BUG=b:161579679 BRANCH=master TEST=build
Change-Id: Ib9fa5ae98568d659326d431a4006174a343fa299 Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43991 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc 1 file changed, 25 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc b/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc new file mode 100644 index 0000000..480e757 --- /dev/null +++ b/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Ordered List of APCB entries, up to 16. +# Entries should match this pattern {NAME}_x{1,2} +# There should be a matching SPD hex file in SPD_SOURCES_DIR +# matching the pattern {NAME}.spd.hex +# The _x{1,2} suffix denotes single or dual channel +# Alternatively, generated APCBs stored at +# 3rdparty/blobs/mainboard/$(MAINBOARDDIR)/APCB_{NAME}.bin will be included. +APCB_SOURCES = hynix-HMA851S6CJR6N-VK_x1 # 0b0000 +APCB_SOURCES += hynix-H5ANAG6NCMR-VKC_x1 # 0b0001 +APCB_SOURCES += samsung-K4A8G165WC-BCTD_x1 # 0b0010 +APCB_SOURCES += samsung-K4AAG165WB-MCTD_x1 # 0b0011 +APCB_SOURCES += samsung-K4A8G165WC-BCWE_x1 # 0b0100 +APCB_SOURCES += hynix-H5AN8G6NDJR-XNC_x1 # 0b0101 +APCB_SOURCES += hynix-H5ANAG6NCMR-XNC_x1 # 0b0110 +APCB_SOURCES += micron-MT40A512M16TB-062E-J_x1 # 0b0111 +APCB_SOURCES += micron-MT40A1G16KD-062E-E_x1 # 0b1000 +APCB_SOURCES += samsung-K4AAG165WA-BCTD_x1 # 0b1001 +APCB_SOURCES += samsung-K4AAG165WA-BCWE_x1 # 0b1010 +APCB_SOURCES += empty # 0b1011 +APCB_SOURCES += empty # 0b1100 +APCB_SOURCES += empty # 0b1101 +APCB_SOURCES += empty # 0b1110 +APCB_SOURCES += empty # 0b1111
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43991 )
Change subject: mb/google/zork: update DRAM SPD table for dirinboz ......................................................................
Patch Set 2:
Thank you, Furquan!
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Furquan Shaikh (Code Review) -
Kevin Chiu (Code Review)
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Martin Roth (Code Review)