Change in coreboot[master]: soc/mediatek/mt8195: fix GPIO register offset - coreboot-gerrit

3 Jun 2021


      Attention is currently required from: Rex-BC Chen, Yu-Ping Wu.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55163 )
Change subject: soc/mediatek/mt8195: fix GPIO register offset
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55163/comment/b5a4c2fc_bedc046f 
PS1, Line 9: Fix GPIO pu/pd offset.
Do you have a reference for these offsets so we can know it's now correct?
Maybe which chapter in the data sheet / application doc ?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9b0f8a24756092a97933cc9d4ba13a9e79c73e91
Gerrit-Change-Number: 55163
Gerrit-PatchSet: 1
Gerrit-Owner: Rex-BC Chen rex-bc.chen@mediatek.corp-partner.google.com
Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org
Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com
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