Change in coreboot[master]: AMD mb: AMD CIMx boards: Fix typo in *is defined* in comments
Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46066 )
Change subject: AMD mb: AMD CIMx boards: Fix typo in *is defined* in comments ......................................................................
AMD mb: AMD CIMx boards: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is *defined* in this case. Fix all occurrences in AMD vendor code with the command below.
git grep -l "is define at" src/mainboard/ | xargs sed -i 's/is define at/is defined at/'
Change-Id: I5aa0e6e064410b305aa5f2775271f6a8988da64b Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/union_station/platform_cfg.h M src/mainboard/asrock/e350m1/platform_cfg.h M src/mainboard/elmex/pcm205400/platform_cfg.h M src/mainboard/gizmosphere/gizmo/platform_cfg.h M src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h M src/mainboard/lippert/frontrunner-af/platform_cfg.h M src/mainboard/pcengines/apu1/platform_cfg.h 10 files changed, 110 insertions(+), 110 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/46066/1
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h index 38447ac..85a60e2 100644 --- a/src/mainboard/amd/inagua/platform_cfg.h +++ b/src/mainboard/amd/inagua/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index d472ad0..32c22bc 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h index 38447ac..85a60e2 100644 --- a/src/mainboard/amd/south_station/platform_cfg.h +++ b/src/mainboard/amd/south_station/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h index 38447ac..85a60e2 100644 --- a/src/mainboard/amd/union_station/platform_cfg.h +++ b/src/mainboard/amd/union_station/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h index 6d3ea82..6994575 100644 --- a/src/mainboard/asrock/e350m1/platform_cfg.h +++ b/src/mainboard/asrock/e350m1/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/elmex/pcm205400/platform_cfg.h b/src/mainboard/elmex/pcm205400/platform_cfg.h index b621f60b..7926249 100644 --- a/src/mainboard/elmex/pcm205400/platform_cfg.h +++ b/src/mainboard/elmex/pcm205400/platform_cfg.h @@ -37,13 +37,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h index 2ea529f..af7da08 100644 --- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h +++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h @@ -40,13 +40,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -143,13 +143,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h index bacb7b1..9c8d0f6 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h +++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h @@ -37,13 +37,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/lippert/frontrunner-af/platform_cfg.h b/src/mainboard/lippert/frontrunner-af/platform_cfg.h index 9f51c40..ba6f0bb 100644 --- a/src/mainboard/lippert/frontrunner-af/platform_cfg.h +++ b/src/mainboard/lippert/frontrunner-af/platform_cfg.h @@ -37,13 +37,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF) #define USB_CONFIG 0x3F @@ -148,13 +148,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ #if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF) #define AZALIA_SDIN_PIN 0x02 diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h index ef6f5ba..44172f6 100644 --- a/src/mainboard/pcengines/apu1/platform_cfg.h +++ b/src/mainboard/pcengines/apu1/platform_cfg.h @@ -39,13 +39,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -141,13 +141,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A
Hello build bot (Jenkins), Michał Żygowski, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46066
to look at the new patch set (#2).
Change subject: mb: AMD CIMx boards: Fix typo in *is defined* in comments ......................................................................
mb: AMD CIMx boards: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is *defined* in this case. Fix all occurrences in AMD vendor code with the command below.
git grep -l "is define at" src/mainboard/ | xargs sed -i 's/is define at/is defined at/'
Change-Id: I5aa0e6e064410b305aa5f2775271f6a8988da64b Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/union_station/platform_cfg.h M src/mainboard/asrock/e350m1/platform_cfg.h M src/mainboard/elmex/pcm205400/platform_cfg.h M src/mainboard/gizmosphere/gizmo/platform_cfg.h M src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h M src/mainboard/lippert/frontrunner-af/platform_cfg.h M src/mainboard/pcengines/apu1/platform_cfg.h 10 files changed, 110 insertions(+), 110 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/46066/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46066 )
Change subject: mb: AMD CIMx boards: Fix typo in *is defined* in comments ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46066 )
Change subject: mb: AMD CIMx boards: Fix typo in *is defined* in comments ......................................................................
mb: AMD CIMx boards: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is *defined* in this case. Fix all occurrences in AMD vendor code with the command below.
git grep -l "is define at" src/mainboard/ | xargs sed -i 's/is define at/is defined at/'
Change-Id: I5aa0e6e064410b305aa5f2775271f6a8988da64b Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/46066 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/union_station/platform_cfg.h M src/mainboard/asrock/e350m1/platform_cfg.h M src/mainboard/elmex/pcm205400/platform_cfg.h M src/mainboard/gizmosphere/gizmo/platform_cfg.h M src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h M src/mainboard/lippert/frontrunner-af/platform_cfg.h M src/mainboard/pcengines/apu1/platform_cfg.h 10 files changed, 110 insertions(+), 110 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h index 38447ac..85a60e2 100644 --- a/src/mainboard/amd/inagua/platform_cfg.h +++ b/src/mainboard/amd/inagua/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index d472ad0..32c22bc 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h index 38447ac..85a60e2 100644 --- a/src/mainboard/amd/south_station/platform_cfg.h +++ b/src/mainboard/amd/south_station/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h index 38447ac..85a60e2 100644 --- a/src/mainboard/amd/union_station/platform_cfg.h +++ b/src/mainboard/amd/union_station/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h index 6d3ea82..6994575 100644 --- a/src/mainboard/asrock/e350m1/platform_cfg.h +++ b/src/mainboard/asrock/e350m1/platform_cfg.h @@ -36,13 +36,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -138,13 +138,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/elmex/pcm205400/platform_cfg.h b/src/mainboard/elmex/pcm205400/platform_cfg.h index b621f60b..7926249 100644 --- a/src/mainboard/elmex/pcm205400/platform_cfg.h +++ b/src/mainboard/elmex/pcm205400/platform_cfg.h @@ -37,13 +37,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h index 2ea529f..af7da08 100644 --- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h +++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h @@ -40,13 +40,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -143,13 +143,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h index bacb7b1..9c8d0f6 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h +++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h @@ -37,13 +37,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A diff --git a/src/mainboard/lippert/frontrunner-af/platform_cfg.h b/src/mainboard/lippert/frontrunner-af/platform_cfg.h index 9f51c40..ba6f0bb 100644 --- a/src/mainboard/lippert/frontrunner-af/platform_cfg.h +++ b/src/mainboard/lippert/frontrunner-af/platform_cfg.h @@ -37,13 +37,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF) #define USB_CONFIG 0x3F @@ -148,13 +148,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ #if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF) #define AZALIA_SDIN_PIN 0x02 diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h index ef6f5ba..44172f6 100644 --- a/src/mainboard/pcengines/apu1/platform_cfg.h +++ b/src/mainboard/pcengines/apu1/platform_cfg.h @@ -39,13 +39,13 @@ * @brief bit[0-6] used to control USB * 0 - Disable * 1 - Enable - * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0 - * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1 - * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2 - * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3 - * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4 - * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5 - * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6 + * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0 + * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1 + * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2 + * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3 + * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4 + * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5 + * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6 */ #define USB_CONFIG 0x7F
@@ -141,13 +141,13 @@ /** * @def AZALIA_SDIN_PIN * @brief - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * 00 - GPIO PIN * 01 - Reserved * 10 - As a Azalia SDIN pin - * SDIN1 is define at BIT2 & BIT3 - * SDIN2 is define at BIT4 & BIT5 - * SDIN3 is define at BIT6 & BIT7 + * SDIN1 is defined at BIT2 & BIT3 + * SDIN2 is defined at BIT4 & BIT5 + * SDIN3 is defined at BIT6 & BIT7 */ //#define AZALIA_SDIN_PIN 0xAA #define AZALIA_SDIN_PIN 0x2A
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Angel Pons (Code Review) -
Paul Menzel (Code Review)