[XS] Change in coreboot[main]: soc/intel/meteorlake: Hook up public microcode

[Michał Kopeć (Code Review)]

Michał Kopeć has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82686?usp=email )

Change subject: soc/intel/meteorlake: Hook up public microcode
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soc/intel/meteorlake: Hook up public microcode

Hook up public microcode for stepping C0 / QS. Microcodes for
engineering samples are not available, so keep
MICROCODE_BLOB_UNDISCLOSED selected for platforms that need it.

Change-Id: I16f20956a1490da02acc24156360aef235111494
Signed-off-by: Michał Kopeć 
---
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/meteorlake/Makefile.mk
2 files changed, 4 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/82686/1

diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index a4ebad4..d7aa13b 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -36,7 +36,6 @@
    select INTEL_GMA_OPREGION_2_1
    select INTEL_GMA_VERSION_2
    select IOAPIC
-	select MICROCODE_BLOB_UNDISCLOSED
    select MP_SERVICES_PPI_V2
    select MRC_CACHE_USING_MRC_VERSION
    select MRC_SETTINGS_PROTECT
@@ -132,6 +131,7 @@
 config SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON
    bool
    default n
+	select MICROCODE_BLOB_UNDISCLOSED
    help
      Choose this option if your mainboard has a Meteor Lake pre-production
      silicon. Typically known as engineering samples (like ES). This type
diff --git a/src/soc/intel/meteorlake/Makefile.mk b/src/soc/intel/meteorlake/Makefile.mk
index 893523c..ff2a17f 100644
--- a/src/soc/intel/meteorlake/Makefile.mk
+++ b/src/soc/intel/meteorlake/Makefile.mk
@@ -60,4 +60,7 @@
 CPPFLAGS_common += -I$(src)/soc/intel/meteorlake
 CPPFLAGS_common += -I$(src)/soc/intel/meteorlake/include

+# C0 stepping
+cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-aa-04
+
 endif