[M] Change in coreboot[master]: WIP: Working on enabling coreboot SBI again

[ron minnich (Code Review)]

Attention is currently required from: Philipp Hug.

Hello Philipp Hug,

I'd like you to do a code review.
Please visit

https://review.coreboot.org/c/coreboot/+/81129?usp=email

to review the following change.

Change subject: WIP: Working on enabling coreboot SBI again
......................................................................

WIP: Working on enabling coreboot SBI again

DO NOT MERGE

Change-Id: I5a9b648f9ad1a4b01ec69178f770419b37bb1377
Signed-off-by: Philipp Hug 
---
M src/arch/riscv/Makefile.mk
M src/arch/riscv/boot.c
M src/arch/riscv/payload.c
3 files changed, 55 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/81129/1

diff --git a/src/arch/riscv/Makefile.mk b/src/arch/riscv/Makefile.mk
index 1131bd5..0931068 100644
--- a/src/arch/riscv/Makefile.mk
+++ b/src/arch/riscv/Makefile.mk
@@ -125,6 +125,7 @@
 ramstage-y += tables.c
 ramstage-y += payload.c
 ramstage-y += fit_payload.c
+ramstage-y += pmp.c

$(eval $(call create_class_compiler,rmodules,riscv))

diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index 6f744d3..ea22774 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -35,9 +35,11 @@
    		// tell OpenSBI to switch to Supervisor mode before jumping to payload
    		run_payload_opensbi(prog, fdt, args->opensbi, RISCV_PAYLOAD_MODE_S);
    	} else {
+			printk(BIOS_DEBUG, "running payload");
    		run_payload(prog, fdt, RISCV_PAYLOAD_MODE_S);
    	}
    } else {
+			printk(BIOS_DEBUG, "running entry");
    	void (*doit)(int hart_id, void *fdt, void *arg) = prog_entry(prog);
    	doit(hart_id, fdt, prog_entry_arg(prog));
    }
diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c
index ee2ee8e..5c47b1e 100644
--- a/src/arch/riscv/payload.c
+++ b/src/arch/riscv/payload.c
@@ -7,6 +7,12 @@
 #include <arch/smp/atomic.h>
 #include <console/console.h>
 #include <vm.h>
+#include <arch/pmp.h>
+
+int pmp_entries_num(void)
+{
+	return 16;
+}

/* Run OpenSBI and let OpenSBI hand over control to the payload */
 void run_payload_opensbi(struct prog *prog, void *fdt, struct prog *opensbi, int payload_mode)
@@ -30,6 +36,23 @@
    run_opensbi(hart_id, fdt, prog_entry(opensbi), prog_entry(prog), payload_mode);
 }

+#define ENVCFG_STCE (1ULL << 63)
+#define ENVCFG_STCE (1ULL << 63)
+#define ENVCFG_STCE (1ULL << 63)
+#define ENVCFG_STCE (1ULL << 63)
+#define ENVCFG_STCE (1ULL << 63)
+
+#define ENVCFG_STCE       (1ULL << 63)
+#define ENVCFG_PBMTE      (1ULL << 62)
+#define ENVCFG_CBZE       (1UL << 7)
+#define ENVCFG_CBCFE      (1UL << 6)
+#define ENVCFG_CBIE_SHIFT 4
+#define ENVCFG_CBIE		(3UL) << ENVCFG_CBIE_SHIFT)
+#define ENVCFG_CBIE_ILL  0UL
+#define ENVCFG_CBIE_FLUS 1UL
+#define ENVCFG_CBIE_INV  3UL
+#define ENVCFG_FIOM      1UL
+
 /* Runs the payload without OpenSBI integration */
 void run_payload(struct prog *prog, void *fdt, int payload_mode)
 {
@@ -40,13 +63,34 @@

switch (payload_mode) {
    case RISCV_PAYLOAD_MODE_S:
+		mstatus_init();
+		//reset_pmp();
+		//	setup_pmp(0x84000000, 0xc0000000-0x84000000, PMP_R | PMP_W | PMP_X);
+		setup_pmp(0, (u64)256 * 1024 * 1024 * 1024, PMP_R | PMP_W | PMP_X);
+		//status = 0;
    	status = INSERT_FIELD(status, MSTATUS_MPP, PRV_S);
+
    	/* Trap vector base address point to the payload */
    	write_csr(stvec, doit);
    	/* disable S-Mode interrupt */
    	write_csr(sie, 0);
    	/* disable MMU */
    	write_csr(satp, 0);
+
+		/* disable M-Mode interrupt */
+        	write_csr(mie, 0);
+
+		long menvcfg_val = read_csr(menvcfg);
+		menvcfg_val |= ENVCFG_CBZE;
+		menvcfg_val |= ENVCFG_CBCFE;
+		menvcfg_val |= ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT;
+		menvcfg_val |= ENVCFG_PBMTE;
+
+		menvcfg_val |= ENVCFG_STCE;
+		printk(BIOS_DEBUG, "run_payload() envcfg: 0x%lx\n", menvcfg_val);
+
+		write_csr(menvcfg, menvcfg_val);
+
    	break;
    case RISCV_PAYLOAD_MODE_M:
    	status = INSERT_FIELD(status, MSTATUS_MPP, PRV_M);
@@ -59,12 +103,14 @@
    	die("wrong privilege level for payload");
    	break;
    }
+
+	printk(BIOS_DEBUG, "run_payload(%p, %p) mstatus: 0x%lx\n", doit, fdt, status);
+
    write_csr(mstatus, status);
    write_csr(mepc, doit);
-	asm volatile(
-		"mv a0, %0\n\t"
-		"mv a1, %1\n\t"
-		"mret" ::"r"(hart_id),
-		"r"(fdt)
-		: "a0", "a1");
+	asm volatile("mv a0, %0\n\t"
+		     "mv a1, %1\n\t"
+		     "mret" ::"r"(hart_id),
+		     "r"(fdt)
+		     : "a0", "a1");
 }