HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32214
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/arm64/arm_tf.c M src/arch/riscv/boot.c M src/arch/riscv/sbi.c M src/commonlib/storage/sdhci_adma.c M src/cpu/amd/family_10h-family_15h/fidvid.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/family_10h-family_15h/init_cpus.h M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/def_callouts.c M src/drivers/amd/agesa/heapmanager.c M src/drivers/amd/agesa/oem_s3.c M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/i2c/at24rf08c/at24rf08c.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c M src/drivers/intel/gma/edid.c M src/drivers/intel/gma/int15.c M src/drivers/lenovo/wacom.c M src/drivers/spi/spi_flash.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/lib/generic_dump_spd.c M src/mainboard/amd/bettong/BiosCallOuts.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/bap/ode_e20XX/BiosCallOuts.c M src/mainboard/bap/ode_e21XX/BiosCallOuts.c M src/mainboard/biostar/am1ml/BiosCallOuts.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/foxconn/g41s-k/romstage.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c M src/mainboard/lippert/toucan-af/BiosCallOuts.c M src/mainboard/msi/ms7721/romstage.c M src/mainboard/pcengines/apu1/BiosCallOuts.c M src/mainboard/pcengines/apu2/BiosCallOuts.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/agesa/family14/state_machine.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctdqs_d.c M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/amd/amdmct/mct/mcttmrl.c M src/northbridge/amd/pi/agesawrapper.c M src/northbridge/via/vx900/memmap.c M src/northbridge/via/vx900/pci_util.c M src/northbridge/via/vx900/vx900.h M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/common/block/pi/def_callouts.c M src/soc/amd/common/block/pi/refcode_loader.c M src/soc/amd/stoneyridge/BiosCallOuts.c M src/soc/amd/stoneyridge/ramtop.c M src/soc/amd/stoneyridge/smbus_spd.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/memmap.c M src/soc/intel/apollolake/uart.c M src/soc/intel/cannonlake/uart.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/gpio/gpio.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/include/soc/hob_mem.h M src/soc/intel/fsp_baytrail/i2c.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/intel/icelake/uart.c M src/soc/intel/quark/acpi.c M src/soc/mediatek/common/spi.c M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c M src/soc/mediatek/mt8173/pmic_wrap.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/mediatek/mt8183/mt6358.c M src/soc/nvidia/tegra210/funitcfg.c M src/soc/nvidia/tegra210/ramstage.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/soc/rockchip/rk3288/crypto.c M src/southbridge/amd/agesa/hudson/resume.c M src/southbridge/amd/agesa/hudson/smbus_spd.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/cimx/sb900/cfg.c M src/southbridge/amd/pi/hudson/smbus_spd.c M src/southbridge/amd/sb800/early_setup.c M src/southbridge/broadcom/bcm5785/early_smbus.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 119 files changed, 79 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/1
diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c index 7cf173b..f43bc02 100644 --- a/src/arch/arm64/arm_tf.c +++ b/src/arch/arm64/arm_tf.c @@ -21,6 +21,7 @@ #include <assert.h> #include <bootmem.h> #include <cbfs.h> +#include <console/console.h> #include <program_loading.h>
/* diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c index 29064b1..edf5295 100644 --- a/src/arch/riscv/boot.c +++ b/src/arch/riscv/boot.c @@ -17,7 +17,6 @@ #include <vm.h> #include <arch/boot.h> #include <arch/encoding.h> -#include <console/console.h> #include <arch/smp/smp.h> #include <mcall.h>
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c index a5f3fd4..e0d7c60 100644 --- a/src/arch/riscv/sbi.c +++ b/src/arch/riscv/sbi.c @@ -20,7 +20,6 @@ #include <sbi.h> #include <vm.h> #include <console/uart.h> -#include <console/console.h> #include <commonlib/helpers.h>
static uintptr_t send_ipi(uintptr_t *pmask, intptr_t type) diff --git a/src/commonlib/storage/sdhci_adma.c b/src/commonlib/storage/sdhci_adma.c index e95742b..09492b7 100644 --- a/src/commonlib/storage/sdhci_adma.c +++ b/src/commonlib/storage/sdhci_adma.c @@ -20,6 +20,7 @@ #include <assert.h> #include <commonlib/sdhci.h> #include <commonlib/storage.h> +#include <console/console.h> #include <delay.h> #include <endian.h> #include "sdhci.h" diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 579cae5..2c6e08c 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -89,6 +89,7 @@
*/
+#include <console/console.h> #include <cpu/amd/msr.h> #include <inttypes.h> #include <northbridge/amd/amdht/AsPsDefs.h> diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index 76bc6d9..719d62f 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <cpu/amd/msr.h> #include <device/pci_ops.h> #include "init_cpus.h" diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.h b/src/cpu/amd/family_10h-family_15h/init_cpus.h index d09fc82..5d653d1 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.h +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.h @@ -17,7 +17,6 @@ #define INIT_CPUS_H
#include <stdlib.h> -#include <console/console.h> #include <cpu/x86/lapic.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/msr.h> diff --git a/src/device/oprom/include/x86emu/x86emu.h b/src/device/oprom/include/x86emu/x86emu.h index fa23e55..4ae82d9 100644 --- a/src/device/oprom/include/x86emu/x86emu.h +++ b/src/device/oprom/include/x86emu/x86emu.h @@ -42,7 +42,6 @@ #define __X86EMU_X86EMU_H
#include <stddef.h> -#include <console/console.h> #if CONFIG(X86EMU_DEBUG) #define DEBUG #endif diff --git a/src/drivers/amd/agesa/def_callouts.c b/src/drivers/amd/agesa/def_callouts.c index 92ccff8..81c1f03 100644 --- a/src/drivers/amd/agesa/def_callouts.c +++ b/src/drivers/amd/agesa/def_callouts.c @@ -21,6 +21,7 @@ #include <AGESA.h> #include <amdlib.h> #include "Ids.h" +#include <console/console.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/dimmSpd.h> diff --git a/src/drivers/amd/agesa/heapmanager.c b/src/drivers/amd/agesa/heapmanager.c index a38696f..4740fff 100644 --- a/src/drivers/amd/agesa/heapmanager.c +++ b/src/drivers/amd/agesa/heapmanager.c @@ -16,6 +16,7 @@ #include <amdlib.h>
#include <cbmem.h> +#include <console/console.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/BiosCallOuts.h>
diff --git a/src/drivers/amd/agesa/oem_s3.c b/src/drivers/amd/agesa/oem_s3.c index 586189b..e8806be 100644 --- a/src/drivers/amd/agesa/oem_s3.c +++ b/src/drivers/amd/agesa/oem_s3.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <spi-generic.h> #include <spi_flash.h> #include <string.h> diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index c6e36b2..56c1984 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -21,7 +21,7 @@ #include <arch/cpu.h> #include <bootstate.h> #include <cbfs.h> - +#include <console/console.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/BiosCallOuts.h> diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c index 6e18a8a..2cf8f28 100644 --- a/src/drivers/generic/gpio_keys/gpio_keys.c +++ b/src/drivers/generic/gpio_keys/gpio_keys.c @@ -15,7 +15,6 @@
#include <arch/acpi_device.h> #include <arch/acpigen.h> -#include <console/console.h> #include <device/device.h> #include <device/path.h> #include <string.h> diff --git a/src/drivers/generic/gpio_regulator/gpio_regulator.c b/src/drivers/generic/gpio_regulator/gpio_regulator.c index 3b33525..3b7718c 100644 --- a/src/drivers/generic/gpio_regulator/gpio_regulator.c +++ b/src/drivers/generic/gpio_regulator/gpio_regulator.c @@ -15,7 +15,6 @@
#include <arch/acpi_device.h> #include <arch/acpigen.h> -#include <console/console.h> #include <device/device.h> #include <device/path.h> #include <string.h> diff --git a/src/drivers/i2c/at24rf08c/at24rf08c.c b/src/drivers/i2c/at24rf08c/at24rf08c.c index 67760a0..7966875 100644 --- a/src/drivers/i2c/at24rf08c/at24rf08c.c +++ b/src/drivers/i2c/at24rf08c/at24rf08c.c @@ -17,7 +17,6 @@ #include <device/device.h> #include <device/smbus.h> #include <smbios.h> -#include <console/console.h>
static void at24rf08c_init(struct device *dev) { diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h index e0da19e..e09bbd9 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.h +++ b/src/drivers/intel/fsp1_0/fsp_util.h @@ -17,6 +17,8 @@ #define FSP_UTIL_H
#include <chipset_fsp_util.h> +#include <console/console.h> + #include "fsp_values.h"
#if CONFIG(ENABLE_MRC_CACHE) diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c index fe6c4b3..00f6307 100644 --- a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c +++ b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c @@ -14,6 +14,7 @@ */
#include <assert.h> +#include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/mp.h> #include <cpu/x86/lapic.h> diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c index 6c464ee..2c7bf49 100644 --- a/src/drivers/intel/gma/edid.c +++ b/src/drivers/intel/gma/edid.c @@ -16,7 +16,6 @@ */
#include <device/mmio.h> -#include <console/console.h> #include <delay.h>
#include "i915_reg.h" diff --git a/src/drivers/intel/gma/int15.c b/src/drivers/intel/gma/int15.c index 5caa1b3..2a9e35a 100644 --- a/src/drivers/intel/gma/int15.c +++ b/src/drivers/intel/gma/int15.c @@ -16,6 +16,7 @@
#include <x86emu/x86emu.h> #include <arch/interrupt.h> +#include <console/console.h> #include "int15.h"
static int active_lfp, pfit, display, panel_type; diff --git a/src/drivers/lenovo/wacom.c b/src/drivers/lenovo/wacom.c index 9dcbf15..aa763a4 100644 --- a/src/drivers/lenovo/wacom.c +++ b/src/drivers/lenovo/wacom.c @@ -15,7 +15,6 @@ */
#include <types.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index 71dc660..8e14acb 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -10,6 +10,7 @@ #include <arch/early_variables.h> #include <assert.h> #include <boot_device.h> +#include <console/console.h> #include <cpu/x86/smm.h> #include <delay.h> #include <stdlib.h> diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 9ff332e..a56d18e 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -17,7 +17,6 @@ #define DEVICE_AZALIA_H
#include <types.h> -#include <console/console.h> #include <arch/acpi.h> #include <device/mmio.h> #include <arch/interrupt.h> diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 728674f..91368fb 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -15,6 +15,7 @@ */
#include <assert.h> +#include <console/console.h> #include <string.h> #include <stdlib.h> #include <boot_device.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index faa937b..df2d1ff 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <console/cbmem_console.h> #include <console/uart.h> #include <cbmem.h> diff --git a/src/lib/fit.c b/src/lib/fit.c index 4e2b75c..a8bca47 100644 --- a/src/lib/fit.c +++ b/src/lib/fit.c @@ -16,6 +16,7 @@ */
#include <assert.h> +#include <console/console.h> #include <endian.h> #include <stdint.h> #include <bootmem.h> diff --git a/src/lib/generic_dump_spd.c b/src/lib/generic_dump_spd.c index 63e47a2..fdde026 100644 --- a/src/lib/generic_dump_spd.c +++ b/src/lib/generic_dump_spd.c @@ -3,6 +3,8 @@ * It should go away either there or here, depending what fits better. */
+#include <console/console.h> + static void dump_spd_registers(const struct mem_controller *ctrl) { int i; diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c index 040de9b..eac83d1 100644 --- a/src/mainboard/amd/bettong/BiosCallOuts.c +++ b/src/mainboard/amd/bettong/BiosCallOuts.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/pci_def.h> #include <device/device.h> #include <AGESA.h> diff --git a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c index af5d34e..056daa2 100644 --- a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c +++ b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c @@ -15,6 +15,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <device/azalia.h> #include <FchPlatform.h> diff --git a/src/mainboard/amd/lamar/BiosCallOuts.c b/src/mainboard/amd/lamar/BiosCallOuts.c index 8891abb..8e49e8e 100644 --- a/src/mainboard/amd/lamar/BiosCallOuts.c +++ b/src/mainboard/amd/lamar/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/amd/olivehillplus/BiosCallOuts.c b/src/mainboard/amd/olivehillplus/BiosCallOuts.c index e3107b1..8975dc8 100644 --- a/src/mainboard/amd/olivehillplus/BiosCallOuts.c +++ b/src/mainboard/amd/olivehillplus/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 65ed138..583debc 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> #include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/agesa/hudson/hudson.h> diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c index a1018b3..ce54741 100644 --- a/src/mainboard/asus/am1i-a/BiosCallOuts.c +++ b/src/mainboard/asus/am1i-a/BiosCallOuts.c @@ -17,6 +17,7 @@
#include <device/azalia.h> #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 2727904..f1dc6d9 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -15,6 +15,7 @@ */
#include <arch/io.h> +#include <console/console.h> #include <device/pnp_type.h> #include <device/pci_ops.h>
diff --git a/src/mainboard/asus/m4a785-m/acpi_tables.c b/src/mainboard/asus/m4a785-m/acpi_tables.c index 1170ed7..cb263f9 100644 --- a/src/mainboard/asus/m4a785-m/acpi_tables.c +++ b/src/mainboard/asus/m4a785-m/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> diff --git a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c index 9f7fbf8..7f8b2f0 100644 --- a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c +++ b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> diff --git a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c index 1d86d53..6458b97 100644 --- a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c +++ b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/biostar/am1ml/BiosCallOuts.c b/src/mainboard/biostar/am1ml/BiosCallOuts.c index 43db0d7..17c25ae 100644 --- a/src/mainboard/biostar/am1ml/BiosCallOuts.c +++ b/src/mainboard/biostar/am1ml/BiosCallOuts.c @@ -16,6 +16,7 @@
#include <device/azalia.h> #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index e1eb820..05e3847 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -22,7 +22,6 @@ #include <device/mmio.h> #include <bootblock_common.h> #include <console/uart.h> -#include <console/console.h> #include <delay.h> #include <cpu/allwinner/a10/gpio.h> #include <cpu/allwinner/a10/clock.h> diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c index 47a7d40..1a9a98e 100644 --- a/src/mainboard/foxconn/g41s-k/romstage.c +++ b/src/mainboard/foxconn/g41s-k/romstage.c @@ -16,6 +16,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/intel/romstage.h> #include <device/pci_ops.h> diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c index 1a03f23..b3189f4 100644 --- a/src/mainboard/google/beltino/smihandler.c +++ b/src/mainboard/google/beltino/smihandler.c @@ -15,7 +15,6 @@ */
#include <arch/acpi.h> -#include <console/console.h> #include <cpu/intel/haswell/haswell.h> #include <cpu/x86/smm.h> #include <northbridge/intel/haswell/haswell.h> diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c index 65139bb..a08e047 100644 --- a/src/mainboard/google/daisy/chromeos.c +++ b/src/mainboard/google/daisy/chromeos.c @@ -14,7 +14,6 @@ */
#include <boot/coreboot_tables.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <soc/cpu.h> diff --git a/src/mainboard/google/dragonegg/romstage_fsp_params.c b/src/mainboard/google/dragonegg/romstage_fsp_params.c index e866c62..e357ee7 100644 --- a/src/mainboard/google/dragonegg/romstage_fsp_params.c +++ b/src/mainboard/google/dragonegg/romstage_fsp_params.c @@ -15,7 +15,6 @@
#include <assert.h> #include <baseboard/variants.h> -#include <console/console.h> #include <soc/romstage.h>
void mainboard_memory_init_params(FSPM_UPD *mupd) diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c index 024fd4c..ccad3ca 100644 --- a/src/mainboard/google/foster/chromeos.c +++ b/src/mainboard/google/foster/chromeos.c @@ -15,7 +15,6 @@ */
#include <boot/coreboot_tables.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <gpio.h> diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 7c18e12..79d9b0f 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -16,7 +16,6 @@
#include <device/mmio.h> #include <bootblock_common.h> -#include <console/console.h> #include <delay.h> #include <soc/grf.h> #include <gpio.h> diff --git a/src/mainboard/google/octopus/variants/phaser/gpio.c b/src/mainboard/google/octopus/variants/phaser/gpio.c index 6883ab0..cb1f467 100644 --- a/src/mainboard/google/octopus/variants/phaser/gpio.c +++ b/src/mainboard/google/octopus/variants/phaser/gpio.c @@ -19,7 +19,6 @@ #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> -#include <console/console.h>
#define SKU_UNKNOWN 0xFFFFFFFF
diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c index f507bd8..2af747e 100644 --- a/src/mainboard/google/peach_pit/chromeos.c +++ b/src/mainboard/google/peach_pit/chromeos.c @@ -15,7 +15,6 @@
#include <boot/coreboot_tables.h> #include <bootmode.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <soc/cpu.h> diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c index 836c97e..dff62c2 100644 --- a/src/mainboard/google/poppy/variants/nami/mainboard.c +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -19,6 +19,7 @@ #include <cbfs.h> #include <chip.h> #include <commonlib/cbfs_serialized.h> +#include <console/console.h> #include <device/device.h> #include <drivers/intel/gma/opregion.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/poppy/variants/nami/smihandler.c b/src/mainboard/google/poppy/variants/nami/smihandler.c index 6816508..56c31e0 100644 --- a/src/mainboard/google/poppy/variants/nami/smihandler.c +++ b/src/mainboard/google/poppy/variants/nami/smihandler.c @@ -15,7 +15,6 @@
#include <arch/acpi.h> #include <baseboard/variants.h> -#include <console/console.h> #include <delay.h> #include "gpio.h"
diff --git a/src/mainboard/google/urara/bootblock.c b/src/mainboard/google/urara/bootblock.c index 5b0b29d..16e7580 100644 --- a/src/mainboard/google/urara/bootblock.c +++ b/src/mainboard/google/urara/bootblock.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/mmio.h> #include <stdint.h> #include <soc/clocks.h> diff --git a/src/mainboard/intel/baskingridge/mainboard_smi.c b/src/mainboard/intel/baskingridge/mainboard_smi.c index 0fd0639..da6f8e8 100644 --- a/src/mainboard/intel/baskingridge/mainboard_smi.c +++ b/src/mainboard/intel/baskingridge/mainboard_smi.c @@ -15,7 +15,6 @@
#include <arch/acpi.h> #include <arch/io.h> -#include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/lynxpoint/nvs.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c index 5ceff51..0682a98 100644 --- a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ #include <arch/byteorder.h> -#include <console/console.h> #include <stdint.h> #include <string.h> #include "spd.h" diff --git a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c index dd33021..fcdc67f 100644 --- a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c +++ b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c @@ -14,7 +14,6 @@ */
#include <arch/byteorder.h> -#include <console/console.h> #include <fsp/api.h> #include <soc/romstage.h> #include "spd/spd.h" diff --git a/src/mainboard/intel/icelake_rvp/spd/spd_util.c b/src/mainboard/intel/icelake_rvp/spd/spd_util.c index 6b73364..b08b3bf 100644 --- a/src/mainboard/intel/icelake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/icelake_rvp/spd/spd_util.c @@ -14,7 +14,6 @@ */ #include <arch/byteorder.h> #include <arch/cpu.h> -#include <console/console.h> #include <intelblocks/mp_init.h> #include <stdint.h> #include <string.h> diff --git a/src/mainboard/intel/kblrvp/spd/spd_util.c b/src/mainboard/intel/kblrvp/spd/spd_util.c index 12d9d10..b3d7e0b 100644 --- a/src/mainboard/intel/kblrvp/spd/spd_util.c +++ b/src/mainboard/intel/kblrvp/spd/spd_util.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ #include <arch/byteorder.h> -#include <console/console.h> #include <stdint.h> #include <string.h> #include <soc/pei_data.h> diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c index 2edb7da..1b5d45e 100644 --- a/src/mainboard/kontron/986lcd-m/mptable.c +++ b/src/mainboard/kontron/986lcd-m/mptable.c @@ -15,7 +15,6 @@
#include <device/device.h> #include <device/pci.h> -#include <console/console.h> #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c index eca687c..9ce9ec7 100644 --- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c +++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> #include <southbridge/amd/cimx/sb800/gpio_oem.h> diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c index 4841008..7e6d0c4 100644 --- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c +++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> #include <southbridge/amd/cimx/sb800/gpio_oem.h> diff --git a/src/mainboard/msi/ms7721/romstage.c b/src/mainboard/msi/ms7721/romstage.c index 0266eff..89a7075 100644 --- a/src/mainboard/msi/ms7721/romstage.c +++ b/src/mainboard/msi/ms7721/romstage.c @@ -16,6 +16,7 @@ */
#include <arch/io.h> +#include <console/console.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pnp.h> diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c index 906ecb6..9279047 100644 --- a/src/mainboard/pcengines/apu1/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <spd_bin.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <SB800.h> diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c index 535024a..edacb22 100644 --- a/src/mainboard/pcengines/apu2/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <spd_bin.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c index cf87d7f..2db0f75 100644 --- a/src/mainboard/roda/rk886ex/mptable.c +++ b/src/mainboard/roda/rk886ex/mptable.c @@ -16,7 +16,6 @@
#include <device/device.h> #include <device/pci.h> -#include <console/console.h> #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> diff --git a/src/mainboard/sifive/hifive-unleashed/mainboard.c b/src/mainboard/sifive/hifive-unleashed/mainboard.c index 2d62cd0..6167504 100644 --- a/src/mainboard/sifive/hifive-unleashed/mainboard.c +++ b/src/mainboard/sifive/hifive-unleashed/mainboard.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <soc/sdram.h> #include <symbols.h>
diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index d29656c..8f58736 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -19,6 +19,7 @@ #include <arch/io.h> #include <cbmem.h> #include <cf9_reset.h> +#include <console/console.h> #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/northbridge/amd/amdht/h3ncmn.h b/src/northbridge/amd/amdht/h3ncmn.h index f4a782d..9d3c34e 100644 --- a/src/northbridge/amd/amdht/h3ncmn.h +++ b/src/northbridge/amd/amdht/h3ncmn.h @@ -19,7 +19,6 @@
#include <inttypes.h> #include <device/pci.h> -#include <console/console.h> #include <cpu/amd/msr.h> #include "comlib.h" #include "h3finit.h" diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index d956315..8c8c5cf 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -34,6 +34,7 @@ */
#include <string.h> +#include <console/console.h> #include <cpu/amd/msr.h> #include <device/pci_ops.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 5d31d44..e01f253 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -24,7 +24,6 @@
#include <inttypes.h> #include "mct_d_gcc.h" -#include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> #include <northbridge/amd/amdfam10/raminit.h>
diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c index 75fc8a4..de9f8d2 100644 --- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> diff --git a/src/northbridge/amd/amdmct/mct/mctsrc.c b/src/northbridge/amd/amdmct/mct/mctsrc.c index 4689c7b..238bb9f 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> #include "mct_d.h" diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c index 192288a..13e54e8 100644 --- a/src/northbridge/amd/amdmct/mct/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> #include "mct_d.h" diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c index 1cc7b7c..393b119 100644 --- a/src/northbridge/amd/pi/agesawrapper.c +++ b/src/northbridge/amd/pi/agesawrapper.c @@ -16,6 +16,7 @@ #include <AGESA.h> #include <cbfs.h> #include <cbmem.h> +#include <console/console.h> #include <delay.h> #include <cpu/x86/mtrr.h> #include <FchPlatform.h> diff --git a/src/northbridge/via/vx900/memmap.c b/src/northbridge/via/vx900/memmap.c index 18d9635..668f249 100644 --- a/src/northbridge/via/vx900/memmap.c +++ b/src/northbridge/via/vx900/memmap.c @@ -22,6 +22,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <console/console.h>
#define MCU PCI_DEV(0, 0, 3)
diff --git a/src/northbridge/via/vx900/pci_util.c b/src/northbridge/via/vx900/pci_util.c index afd35a1..07a9a71 100644 --- a/src/northbridge/via/vx900/pci_util.c +++ b/src/northbridge/via/vx900/pci_util.c @@ -14,6 +14,8 @@ * GNU General Public License for more details. */
+#include <console/console.h> + #include "vx900.h"
#ifdef __SIMPLE_DEVICE__ diff --git a/src/northbridge/via/vx900/vx900.h b/src/northbridge/via/vx900/vx900.h index 9e30638..96d821a 100644 --- a/src/northbridge/via/vx900/vx900.h +++ b/src/northbridge/via/vx900/vx900.h @@ -28,7 +28,6 @@
#include <device/pci_ops.h> #include <device/pci.h> -#include <console/console.h>
u32 vx900_get_tolm(void); void vx900_set_chrome9hd_fb_size(u32 size_mb); diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 5295567..5dabc80 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -16,6 +16,7 @@
#include <arch/acpi.h> #include <cbmem.h> +#include <console/console.h> #include <delay.h> #include <timestamp.h> #include <amdblocks/s3_resume.h> diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c index 0b119b7..6734b55 100644 --- a/src/soc/amd/common/block/pi/def_callouts.c +++ b/src/soc/amd/common/block/pi/def_callouts.c @@ -15,6 +15,7 @@ */
#include <cbfs.h> +#include <console/console.h> #include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <timer.h> diff --git a/src/soc/amd/common/block/pi/refcode_loader.c b/src/soc/amd/common/block/pi/refcode_loader.c index 47402b6..3ffaf36 100644 --- a/src/soc/amd/common/block/pi/refcode_loader.c +++ b/src/soc/amd/common/block/pi/refcode_loader.c @@ -16,6 +16,7 @@ #include <arch/acpi.h> #include <cbfs.h> #include <cbmem.h> +#include <console/console.h> #include <rmodule.h> #include <stage_cache.h> #include <amdblocks/agesawrapper.h> diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index 1027ae0..d7f9672 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/device.h> #include <device/pci_def.h> #include <amdblocks/BiosCallOuts.h> diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c index edd5c239..d688c34 100644 --- a/src/soc/amd/stoneyridge/ramtop.c +++ b/src/soc/amd/stoneyridge/ramtop.c @@ -21,6 +21,7 @@ #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> #include <cbmem.h> +#include <console/console.h> #include <stage_cache.h> #include <arch/bert_storage.h> #include <soc/northbridge.h> diff --git a/src/soc/amd/stoneyridge/smbus_spd.c b/src/soc/amd/stoneyridge/smbus_spd.c index 63b457c..ed73a6e 100644 --- a/src/soc/amd/stoneyridge/smbus_spd.c +++ b/src/soc/amd/stoneyridge/smbus_spd.c @@ -14,6 +14,7 @@ */
#include <amdblocks/agesawrapper.h> +#include <console/console.h> #include <device/pci_def.h> #include <device/device.h> #include <soc/southbridge.h> diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 07cb2ad..c57f15c 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -22,6 +22,7 @@ #include <arch/smp/mpspec.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <console/console.h> #include <cpu/x86/smm.h> #include <gpio.h> #include <intelblocks/acpi.h> diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c index ba1433c..5d0e196 100644 --- a/src/soc/intel/apollolake/memmap.c +++ b/src/soc/intel/apollolake/memmap.c @@ -18,6 +18,7 @@ #include <assert.h> #include <cbmem.h> #include "chip.h" +#include <console/console.h> #include <device/pci.h> #include <fsp/memmap.h> #include <intelblocks/smm.h> diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c index e8e2661..1a31e20 100644 --- a/src/soc/intel/apollolake/uart.c +++ b/src/soc/intel/apollolake/uart.c @@ -21,6 +21,7 @@ */
#include <assert.h> +#include <console/console.h> #include <intelblocks/uart.h> #include <soc/gpio.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c index 421cafc..1b72b24 100644 --- a/src/soc/intel/cannonlake/uart.c +++ b/src/soc/intel/cannonlake/uart.c @@ -14,6 +14,7 @@ */
#include <assert.h> +#include <console/console.h> #include <device/pci_def.h> #include <intelblocks/gpio.h> #include <intelblocks/lpss.h> diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index c872e51..3a34c79 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -20,6 +20,7 @@ #include <bootstate.h> #include <cbmem.h> #include <cf9_reset.h> +#include <console/console.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> #include <cpu/x86/smm.h> diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 342a120..0a59c56 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -15,6 +15,7 @@
#include <assert.h> #include <bootstate.h> +#include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index 0065a6c..47e2817 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -13,7 +13,9 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <assert.h> +#include <console/console.h> #include <intelblocks/gpio.h> #include <gpio.h> #include <intelblocks/itss.h> diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index f3e91ff..e969a04 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -26,7 +26,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <cbmem.h> - +#include <console/console.h> #include <intelblocks/acpi.h> #include <soc/acpi.h> #include <soc/cpu.h> diff --git a/src/soc/intel/denverton_ns/include/soc/hob_mem.h b/src/soc/intel/denverton_ns/include/soc/hob_mem.h index d98295b..44d73fa 100644 --- a/src/soc/intel/denverton_ns/include/soc/hob_mem.h +++ b/src/soc/intel/denverton_ns/include/soc/hob_mem.h @@ -19,6 +19,7 @@ #ifndef _DENVERTON_NS_HOB_MEM_H #define _DENVERTON_NS_HOB_MEM_H
+#include <console/console.h> #include <fsp/util.h>
void soc_display_fsp_smbios_memory_info_hob( diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c index 68f5626..d368d8b 100644 --- a/src/soc/intel/fsp_baytrail/i2c.c +++ b/src/soc/intel/fsp_baytrail/i2c.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/pci.h> #include <device/pci_ops.h> #include <soc/baytrail.h> diff --git a/src/soc/intel/fsp_baytrail/include/soc/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h index 7b3a3c8..f0ae0b3 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/i2c.h +++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h @@ -16,7 +16,6 @@ #ifndef __SOC_INTEL_FSP_BAYTRAIL_I2C_H__ #define __SOC_INTEL_FSP_BAYTRAIL_I2C_H__
-#include <console/console.h> #include <device/pci_def.h> #include <stdlib.h>
diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index 2d35f5b..0940791 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 0e4388e..464c25e 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -14,7 +14,6 @@ */
#include <chip.h> -#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <fsp/api.h> diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c index a3bce93..ac66d9b 100644 --- a/src/soc/intel/icelake/lpc.c +++ b/src/soc/intel/icelake/lpc.c @@ -14,7 +14,6 @@ */
#include "chip.h" -#include <console/console.h> #include <delay.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/icelake/systemagent.c b/src/soc/intel/icelake/systemagent.c index 7903667..930e78e 100644 --- a/src/soc/intel/icelake/systemagent.c +++ b/src/soc/intel/icelake/systemagent.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <intelblocks/systemagent.h> diff --git a/src/soc/intel/icelake/uart.c b/src/soc/intel/icelake/uart.c index 421cafc..1b72b24 100644 --- a/src/soc/intel/icelake/uart.c +++ b/src/soc/intel/icelake/uart.c @@ -14,6 +14,7 @@ */
#include <assert.h> +#include <console/console.h> #include <device/pci_def.h> #include <intelblocks/gpio.h> #include <intelblocks/lpss.h> diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 83bed34..2cb5adf 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <soc/acpi.h> #include <soc/ramstage.h>
diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c index 3e7186a..334a757 100644 --- a/src/soc/mediatek/common/spi.c +++ b/src/soc/mediatek/common/spi.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/mmio.h> #include <assert.h> #include <endian.h> diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c index 9e4cb11..636f895 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c @@ -15,6 +15,7 @@
#include <device/mmio.h> #include <assert.h> +#include <console/console.h> #include <delay.h> #include <stdlib.h> #include <soc/addressmap.h> diff --git a/src/soc/mediatek/mt8173/pmic_wrap.c b/src/soc/mediatek/mt8173/pmic_wrap.c index 469653a..6acaee2 100644 --- a/src/soc/mediatek/mt8173/pmic_wrap.c +++ b/src/soc/mediatek/mt8173/pmic_wrap.c @@ -15,6 +15,7 @@
#include <device/mmio.h> #include <assert.h> +#include <console/console.h> #include <delay.h> #include <soc/infracfg.h> #include <soc/pmic_wrap.h> diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c index caf9a03..a167d2b 100644 --- a/src/soc/mediatek/mt8183/auxadc.c +++ b/src/soc/mediatek/mt8183/auxadc.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <assert.h> -#include <console/console.h> #include <delay.h> #include <soc/addressmap.h> #include <soc/auxadc.h> diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index 3dc9fe2..d338e16 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -14,6 +14,7 @@ */
#include <assert.h> +#include <console/console.h> #include <soc/pmic_wrap.h> #include <soc/mt6358.h>
diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c index a218862..887f9f0 100644 --- a/src/soc/nvidia/tegra210/funitcfg.c +++ b/src/soc/nvidia/tegra210/funitcfg.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/funitcfg.h> diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c index 54f4204..13fa1c6 100644 --- a/src/soc/nvidia/tegra210/ramstage.c +++ b/src/soc/nvidia/tegra210/ramstage.c @@ -15,6 +15,7 @@
#include <arch/lib_helpers.h> #include <arch/stages.h> +#include <console/console.h> #include <device/mmio.h> #include <gic.h> #include <soc/addressmap.h> diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c index fe2d673..66c3103 100644 --- a/src/soc/qualcomm/ipq806x/uart.c +++ b/src/soc/qualcomm/ipq806x/uart.c @@ -33,7 +33,6 @@
#include <device/mmio.h> #include <boot/coreboot_tables.h> -#include <console/console.h> #include <console/uart.h> #include <delay.h> #include <gpio.h> diff --git a/src/soc/qualcomm/qcs405/clock.c b/src/soc/qualcomm/qcs405/clock.c index 31fdc3d..8034d2e 100644 --- a/src/soc/qualcomm/qcs405/clock.c +++ b/src/soc/qualcomm/qcs405/clock.c @@ -14,7 +14,6 @@
#include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timer.h> #include <timestamp.h> diff --git a/src/soc/qualcomm/qcs405/gpio.c b/src/soc/qualcomm/qcs405/gpio.c index db8b7a1..66e0ba8 100644 --- a/src/soc/qualcomm/qcs405/gpio.c +++ b/src/soc/qualcomm/qcs405/gpio.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timer.h> #include <timestamp.h> diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c index bdbcfb8..177ddb3 100644 --- a/src/soc/qualcomm/sdm845/clock.c +++ b/src/soc/qualcomm/sdm845/clock.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timer.h> #include <commonlib/helpers.h> diff --git a/src/soc/rockchip/rk3288/crypto.c b/src/soc/rockchip/rk3288/crypto.c index 90275ff..09c9c4b 100644 --- a/src/soc/rockchip/rk3288/crypto.c +++ b/src/soc/rockchip/rk3288/crypto.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/mmio.h> #include <assert.h> #include <delay.h> diff --git a/src/southbridge/amd/agesa/hudson/resume.c b/src/southbridge/amd/agesa/hudson/resume.c index 8a07565..efc35bd 100644 --- a/src/southbridge/amd/agesa/hudson/resume.c +++ b/src/southbridge/amd/agesa/hudson/resume.c @@ -18,7 +18,7 @@ #include <device/device.h> #include "hudson.h" #include <AGESA.h> - +#include <console/console.h> #include <northbridge/amd/agesa/state_machine.h>
extern FCH_DATA_BLOCK InitEnvCfgDefault; diff --git a/src/southbridge/amd/agesa/hudson/smbus_spd.c b/src/southbridge/amd/agesa/hudson/smbus_spd.c index cb2fbe7..3fb4797 100644 --- a/src/southbridge/amd/agesa/hudson/smbus_spd.c +++ b/src/southbridge/amd/agesa/hudson/smbus_spd.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/pci_def.h> #include <device/device.h>
diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c index 2e6781a..bb3fb88 100644 --- a/src/southbridge/amd/amd8111/early_smbus.c +++ b/src/southbridge/amd/amd8111/early_smbus.c @@ -12,6 +12,7 @@ */
#include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> #include "amd8111_smbus.h"
diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h index 04b8abc..7ea2caa 100644 --- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h @@ -53,7 +53,6 @@ #define IMC_ENABLE_OVER_WRITE 0x01 #endif
-#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include <SB800.h> diff --git a/src/southbridge/amd/cimx/sb900/SbPlatform.h b/src/southbridge/amd/cimx/sb900/SbPlatform.h index 660553f..f5c11d4 100644 --- a/src/southbridge/amd/cimx/sb900/SbPlatform.h +++ b/src/southbridge/amd/cimx/sb900/SbPlatform.h @@ -49,7 +49,6 @@ #endif #define FIXUP_PTR(ptr) ptr
-#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include "Hudson-2.h" diff --git a/src/southbridge/amd/cimx/sb900/cfg.c b/src/southbridge/amd/cimx/sb900/cfg.c index bc7e742..a4ba798 100644 --- a/src/southbridge/amd/cimx/sb900/cfg.c +++ b/src/southbridge/amd/cimx/sb900/cfg.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */
- +#include <console/console.h> #include <string.h> #include "SbPlatform.h" #include "platform_cfg.h" diff --git a/src/southbridge/amd/pi/hudson/smbus_spd.c b/src/southbridge/amd/pi/hudson/smbus_spd.c index 8d67b1e..f75966e 100644 --- a/src/southbridge/amd/pi/hudson/smbus_spd.c +++ b/src/southbridge/amd/pi/hudson/smbus_spd.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/pci_def.h> #include <device/device.h>
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 6a575e3..cf66069 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -17,6 +17,7 @@ #define _SB800_EARLY_SETUP_C_
#include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/common/reset.h> diff --git a/src/southbridge/broadcom/bcm5785/early_smbus.c b/src/southbridge/broadcom/bcm5785/early_smbus.c index bcbfb12..444772b 100644 --- a/src/southbridge/broadcom/bcm5785/early_smbus.c +++ b/src/southbridge/broadcom/bcm5785/early_smbus.c @@ -15,6 +15,7 @@ */
#include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> #include "smbus.h"
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index 1e357df..156c387 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -17,6 +17,7 @@ */
#include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <southbridge/amd/common/reset.h>
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 3099a09..9a3eb27 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -16,6 +16,7 @@ */
#include <arch/io.h> +#include <console/console.h>
#ifdef UNUSED_CODE int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);
Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, ron minnich, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, David Guckian, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32214
to look at the new patch set (#2).
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/arm64/arm_tf.c M src/arch/riscv/boot.c M src/arch/riscv/sbi.c M src/commonlib/storage/sdhci_adma.c M src/cpu/amd/family_10h-family_15h/fidvid.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/family_10h-family_15h/init_cpus.h M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/def_callouts.c M src/drivers/amd/agesa/heapmanager.c M src/drivers/amd/agesa/oem_s3.c M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c M src/drivers/intel/gma/int15.c M src/drivers/lenovo/wacom.c M src/drivers/spi/spi_flash.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/lib/generic_dump_spd.c M src/mainboard/amd/bettong/BiosCallOuts.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/bap/ode_e20XX/BiosCallOuts.c M src/mainboard/bap/ode_e21XX/BiosCallOuts.c M src/mainboard/biostar/am1ml/BiosCallOuts.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/foxconn/g41s-k/romstage.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c M src/mainboard/lippert/toucan-af/BiosCallOuts.c M src/mainboard/msi/ms7721/romstage.c M src/mainboard/pcengines/apu1/BiosCallOuts.c M src/mainboard/pcengines/apu2/BiosCallOuts.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/agesa/family14/state_machine.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctdqs_d.c M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/amd/amdmct/mct/mcttmrl.c M src/northbridge/amd/pi/agesawrapper.c M src/northbridge/via/vx900/memmap.c M src/northbridge/via/vx900/pci_util.c M src/northbridge/via/vx900/vx900.h M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/common/block/pi/def_callouts.c M src/soc/amd/common/block/pi/refcode_loader.c M src/soc/amd/stoneyridge/BiosCallOuts.c M src/soc/amd/stoneyridge/ramtop.c M src/soc/amd/stoneyridge/smbus_spd.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/memmap.c M src/soc/intel/apollolake/uart.c M src/soc/intel/cannonlake/uart.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/gpio/gpio.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/include/soc/hob_mem.h M src/soc/intel/fsp_baytrail/i2c.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/intel/icelake/uart.c M src/soc/intel/quark/acpi.c M src/soc/mediatek/common/spi.c M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c M src/soc/mediatek/mt8173/pmic_wrap.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/mediatek/mt8183/mt6358.c M src/soc/nvidia/tegra210/funitcfg.c M src/soc/nvidia/tegra210/ramstage.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/soc/rockchip/rk3288/crypto.c M src/southbridge/amd/agesa/hudson/resume.c M src/southbridge/amd/agesa/hudson/smbus_spd.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/cimx/sb900/cfg.c M src/southbridge/amd/pi/hudson/smbus_spd.c M src/southbridge/amd/sb800/early_setup.c M src/southbridge/broadcom/bcm5785/early_smbus.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 117 files changed, 80 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/2
Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, ron minnich, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, David Guckian, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32214
to look at the new patch set (#3).
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/riscv/sbi.c M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/gma/int15.c M src/drivers/lenovo/wacom.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/msi/ms7721/romstage.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/via/vx900/vx900.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/sb800/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 59 files changed, 21 insertions(+), 41 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/3
Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, ron minnich, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, David Guckian, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32214
to look at the new patch set (#4).
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/riscv/sbi.c M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/gma/int15.c M src/drivers/lenovo/wacom.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/msi/ms7721/romstage.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/via/vx900/vx900.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/sb800/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 59 files changed, 41 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/4
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/32214/4/src/soc/intel/icelake/lpc.c File src/soc/intel/icelake/lpc.c:
https://review.coreboot.org/#/c/32214/4/src/soc/intel/icelake/lpc.c@16 PS4, Line 16: #include "chip.h" Thank you for the review. this is already moved down. Please see https://review.coreboot.org/#/c/coreboot/+/32012/6/src/soc/intel/icelake/lpc...
https://review.coreboot.org/#/c/32214/4/src/soc/qualcomm/sdm845/clock.c File src/soc/qualcomm/sdm845/clock.c:
https://review.coreboot.org/#/c/32214/4/src/soc/qualcomm/sdm845/clock.c@22 PS4, Line 22: this extra-line is removed here : https://review.coreboot.org/#/c/coreboot/+/32009/5/src/soc/qualcomm/sdm845/c...
Thank you.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 4:
Why was this split from CB:32122 ?
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 4:
Patch Set 4:
Why was this split from CB:32122 ?
CB:32212 !
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 4:
Patch Set 4:
Why was this split from CB:32122 ?
CB:32212 !
Thank you for the review one CB is older than the other. I didn't merged them together otherwise, it will give a huge change and will be not easy to review.
I'm ok, if you want me to merge them together into only one change
Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, Werner Zeh, ron minnich, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, David Guckian, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32214
to look at the new patch set (#5).
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/riscv/sbi.c M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/gma/int15.c M src/drivers/lenovo/wacom.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/msi/ms7721/romstage.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/via/vx900/vx900.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/sb800/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 59 files changed, 41 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/5
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 5:
rebased to solve "Merge Conflict"
Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, Werner Zeh, ron minnich, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, David Guckian, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32214
to look at the new patch set (#7).
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/riscv/sbi.c M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/gma/int15.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/msi/ms7721/romstage.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/via/vx900/vx900.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/sb800/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 58 files changed, 40 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/7
HAOUAS Elyes has removed Vanny E from this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Removed reviewer Vanny E.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 7: Code-Review+1
(3 comments)
https://review.coreboot.org/#/c/32214/7/src/drivers/amd/agesa/state_machine.... File src/drivers/amd/agesa/state_machine.c:
https://review.coreboot.org/#/c/32214/7/src/drivers/amd/agesa/state_machine.... PS7, Line 19: delete extra newline?
https://review.coreboot.org/#/c/32214/7/src/drivers/amd/agesa/state_machine.... PS7, Line 29: delete extra newline?
https://review.coreboot.org/#/c/32214/7/src/mainboard/msi/ms7721/romstage.c File src/mainboard/msi/ms7721/romstage.c:
https://review.coreboot.org/#/c/32214/7/src/mainboard/msi/ms7721/romstage.c@... PS7, Line 19: #include <console/console.h> Can't see anything that needs console.h here.
Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, Werner Zeh, ron minnich, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, David Guckian, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32214
to look at the new patch set (#8).
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/riscv/sbi.c M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/gma/int15.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/via/vx900/vx900.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/sb800/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 57 files changed, 39 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32214/8
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 8: Code-Review+2
David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
Patch Set 8: Code-Review+1
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32214 )
Change subject: src: Use include <console/console.h> when appropriate ......................................................................
src: Use include <console/console.h> when appropriate
Change-Id: Iddba5b03fc554a6edc4b26458d834e47958a6b08 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/32214 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Werner Zeh werner.zeh@siemens.com Reviewed-by: David Guckian --- M src/arch/riscv/sbi.c M src/device/oprom/include/x86emu/x86emu.h M src/drivers/amd/agesa/state_machine.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/gma/int15.c M src/include/device/azalia_device.h M src/lib/cbfs.c M src/lib/cbmem_console.c M src/lib/fit.c M src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c M src/mainboard/amd/lamar/BiosCallOuts.c M src/mainboard/amd/olivehillplus/BiosCallOuts.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/f2a85-m/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/cubietech/cubieboard/bootblock.c M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/dragonegg/romstage_fsp_params.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gru/bootblock.c M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/poppy/variants/nami/smihandler.c M src/mainboard/google/urara/bootblock.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c M src/mainboard/intel/icelake_rvp/spd/spd_util.c M src/mainboard/intel/kblrvp/spd/spd_util.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/roda/rk886ex/mptable.c M src/mainboard/sifive/hifive-unleashed/mainboard.c M src/northbridge/amd/amdht/h3ncmn.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/via/vx900/vx900.h M src/soc/intel/apollolake/memmap.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/lpc.c M src/soc/intel/icelake/systemagent.c M src/soc/mediatek/mt8183/auxadc.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/gpio.c M src/soc/qualcomm/sdm845/clock.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/cimx/sb800/SBPLATFORM.h M src/southbridge/amd/cimx/sb900/SbPlatform.h M src/southbridge/amd/sb800/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 57 files changed, 39 insertions(+), 51 deletions(-)
Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved David Guckian: Looks good to me, but someone else must approve
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c index a5f3fd4..e0d7c60 100644 --- a/src/arch/riscv/sbi.c +++ b/src/arch/riscv/sbi.c @@ -20,7 +20,6 @@ #include <sbi.h> #include <vm.h> #include <console/uart.h> -#include <console/console.h> #include <commonlib/helpers.h>
static uintptr_t send_ipi(uintptr_t *pmask, intptr_t type) diff --git a/src/device/oprom/include/x86emu/x86emu.h b/src/device/oprom/include/x86emu/x86emu.h index fa23e55..4ae82d9 100644 --- a/src/device/oprom/include/x86emu/x86emu.h +++ b/src/device/oprom/include/x86emu/x86emu.h @@ -42,7 +42,6 @@ #define __X86EMU_X86EMU_H
#include <stddef.h> -#include <console/console.h> #if CONFIG(X86EMU_DEBUG) #define DEBUG #endif diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index c6e36b2..dfd64c3d 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -16,17 +16,15 @@
#include <stdint.h> #include <string.h> - #include <arch/acpi.h> #include <arch/cpu.h> #include <bootstate.h> #include <cbfs.h> - +#include <console/console.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <amdlib.h> - #include <AMD.h>
#if CONFIG(CPU_AMD_AGESA_OPENSOURCE) diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c index 6e18a8a..2cf8f28 100644 --- a/src/drivers/generic/gpio_keys/gpio_keys.c +++ b/src/drivers/generic/gpio_keys/gpio_keys.c @@ -15,7 +15,6 @@
#include <arch/acpi_device.h> #include <arch/acpigen.h> -#include <console/console.h> #include <device/device.h> #include <device/path.h> #include <string.h> diff --git a/src/drivers/generic/gpio_regulator/gpio_regulator.c b/src/drivers/generic/gpio_regulator/gpio_regulator.c index 3b33525..3b7718c 100644 --- a/src/drivers/generic/gpio_regulator/gpio_regulator.c +++ b/src/drivers/generic/gpio_regulator/gpio_regulator.c @@ -15,7 +15,6 @@
#include <arch/acpi_device.h> #include <arch/acpigen.h> -#include <console/console.h> #include <device/device.h> #include <device/path.h> #include <string.h> diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h index e0da19e..e09bbd9 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.h +++ b/src/drivers/intel/fsp1_0/fsp_util.h @@ -17,6 +17,8 @@ #define FSP_UTIL_H
#include <chipset_fsp_util.h> +#include <console/console.h> + #include "fsp_values.h"
#if CONFIG(ENABLE_MRC_CACHE) diff --git a/src/drivers/intel/gma/int15.c b/src/drivers/intel/gma/int15.c index 5caa1b3..80949d1 100644 --- a/src/drivers/intel/gma/int15.c +++ b/src/drivers/intel/gma/int15.c @@ -16,6 +16,8 @@
#include <x86emu/x86emu.h> #include <arch/interrupt.h> +#include <console/console.h> + #include "int15.h"
static int active_lfp, pfit, display, panel_type; diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 9ff332e..343e261 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -17,11 +17,9 @@ #define DEVICE_AZALIA_H
#include <types.h> -#include <console/console.h> #include <arch/acpi.h> #include <device/mmio.h> #include <arch/interrupt.h> - #include <device/device.h>
void azalia_audio_init(struct device *dev); diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 728674f..91368fb 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -15,6 +15,7 @@ */
#include <assert.h> +#include <console/console.h> #include <string.h> #include <stdlib.h> #include <boot_device.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index faa937b..df2d1ff 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <console/cbmem_console.h> #include <console/uart.h> #include <cbmem.h> diff --git a/src/lib/fit.c b/src/lib/fit.c index 4e2b75c..a8bca47 100644 --- a/src/lib/fit.c +++ b/src/lib/fit.c @@ -16,6 +16,7 @@ */
#include <assert.h> +#include <console/console.h> #include <endian.h> #include <stdint.h> #include <bootmem.h> diff --git a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c index af5d34e..056daa2 100644 --- a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c +++ b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c @@ -15,6 +15,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <device/azalia.h> #include <FchPlatform.h> diff --git a/src/mainboard/amd/lamar/BiosCallOuts.c b/src/mainboard/amd/lamar/BiosCallOuts.c index 8891abb..8e49e8e 100644 --- a/src/mainboard/amd/lamar/BiosCallOuts.c +++ b/src/mainboard/amd/lamar/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/amd/olivehillplus/BiosCallOuts.c b/src/mainboard/amd/olivehillplus/BiosCallOuts.c index e3107b1..8975dc8 100644 --- a/src/mainboard/amd/olivehillplus/BiosCallOuts.c +++ b/src/mainboard/amd/olivehillplus/BiosCallOuts.c @@ -14,6 +14,7 @@ */
#include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 65ed138..1d89e4d 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -16,10 +16,10 @@ #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> #include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/agesa/hudson/hudson.h> - #include <superio/smsc/lpc47n217/lpc47n217.h>
#define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1) diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c index a1018b3..ce54741 100644 --- a/src/mainboard/asus/am1i-a/BiosCallOuts.c +++ b/src/mainboard/asus/am1i-a/BiosCallOuts.c @@ -17,6 +17,7 @@
#include <device/azalia.h> #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 2727904..d5acdb5 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -15,15 +15,14 @@ */
#include <arch/io.h> +#include <console/console.h> #include <device/pnp_type.h> #include <device/pci_ops.h> - #include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/agesa/hudson/hudson.h> #include <southbridge/amd/agesa/hudson/smbus.h> #include <stdint.h> - #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h> #include <superio/nuvoton/common/nuvoton.h> diff --git a/src/mainboard/asus/m4a785-m/acpi_tables.c b/src/mainboard/asus/m4a785-m/acpi_tables.c index 1170ed7..cb263f9 100644 --- a/src/mainboard/asus/m4a785-m/acpi_tables.c +++ b/src/mainboard/asus/m4a785-m/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index e1eb820..05e3847 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -22,7 +22,6 @@ #include <device/mmio.h> #include <bootblock_common.h> #include <console/uart.h> -#include <console/console.h> #include <delay.h> #include <cpu/allwinner/a10/gpio.h> #include <cpu/allwinner/a10/clock.h> diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c index 1a03f23..e786ef5 100644 --- a/src/mainboard/google/beltino/smihandler.c +++ b/src/mainboard/google/beltino/smihandler.c @@ -15,7 +15,6 @@ */
#include <arch/acpi.h> -#include <console/console.h> #include <cpu/intel/haswell/haswell.h> #include <cpu/x86/smm.h> #include <northbridge/intel/haswell/haswell.h> @@ -24,6 +23,7 @@ #include <southbridge/intel/lynxpoint/pch.h> #include <elog.h> #include <superio/ite/it8772f/it8772f.h> + #include "onboard.h"
void mainboard_smi_sleep(u8 slp_typ) diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c index c06f839..968f1f9 100644 --- a/src/mainboard/google/daisy/chromeos.c +++ b/src/mainboard/google/daisy/chromeos.c @@ -14,7 +14,6 @@ */
#include <boot/coreboot_tables.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <soc/cpu.h> diff --git a/src/mainboard/google/dragonegg/romstage_fsp_params.c b/src/mainboard/google/dragonegg/romstage_fsp_params.c index e866c62..e357ee7 100644 --- a/src/mainboard/google/dragonegg/romstage_fsp_params.c +++ b/src/mainboard/google/dragonegg/romstage_fsp_params.c @@ -15,7 +15,6 @@
#include <assert.h> #include <baseboard/variants.h> -#include <console/console.h> #include <soc/romstage.h>
void mainboard_memory_init_params(FSPM_UPD *mupd) diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c index 026dd3e..591cfd0 100644 --- a/src/mainboard/google/foster/chromeos.c +++ b/src/mainboard/google/foster/chromeos.c @@ -15,7 +15,6 @@ */
#include <boot/coreboot_tables.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <gpio.h> diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 7c18e12..79d9b0f 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -16,7 +16,6 @@
#include <device/mmio.h> #include <bootblock_common.h> -#include <console/console.h> #include <delay.h> #include <soc/grf.h> #include <gpio.h> diff --git a/src/mainboard/google/octopus/variants/phaser/gpio.c b/src/mainboard/google/octopus/variants/phaser/gpio.c index 076476b..281bde0 100644 --- a/src/mainboard/google/octopus/variants/phaser/gpio.c +++ b/src/mainboard/google/octopus/variants/phaser/gpio.c @@ -19,7 +19,6 @@ #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> -#include <console/console.h>
#define SKU_UNKNOWN 0xFFFFFFFF
diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c index 00dd1f3..b2d90d9 100644 --- a/src/mainboard/google/peach_pit/chromeos.c +++ b/src/mainboard/google/peach_pit/chromeos.c @@ -15,7 +15,6 @@
#include <boot/coreboot_tables.h> #include <bootmode.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <soc/cpu.h> diff --git a/src/mainboard/google/poppy/variants/nami/smihandler.c b/src/mainboard/google/poppy/variants/nami/smihandler.c index 6816508..61162b4 100644 --- a/src/mainboard/google/poppy/variants/nami/smihandler.c +++ b/src/mainboard/google/poppy/variants/nami/smihandler.c @@ -15,8 +15,8 @@
#include <arch/acpi.h> #include <baseboard/variants.h> -#include <console/console.h> #include <delay.h> + #include "gpio.h"
#define TOUCH_DISABLE GPP_C3 diff --git a/src/mainboard/google/urara/bootblock.c b/src/mainboard/google/urara/bootblock.c index 5b0b29d..16e7580 100644 --- a/src/mainboard/google/urara/bootblock.c +++ b/src/mainboard/google/urara/bootblock.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/mmio.h> #include <stdint.h> #include <soc/clocks.h> diff --git a/src/mainboard/intel/baskingridge/mainboard_smi.c b/src/mainboard/intel/baskingridge/mainboard_smi.c index 0fd0639..da6f8e8 100644 --- a/src/mainboard/intel/baskingridge/mainboard_smi.c +++ b/src/mainboard/intel/baskingridge/mainboard_smi.c @@ -15,7 +15,6 @@
#include <arch/acpi.h> #include <arch/io.h> -#include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/lynxpoint/nvs.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c index 5ceff51..dd209dc 100644 --- a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c @@ -12,10 +12,11 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/byteorder.h> -#include <console/console.h> #include <stdint.h> #include <string.h> + #include "spd.h"
void mainboard_fill_dq_map_ch0(void *dq_map_ptr) diff --git a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c index dd33021..b9ce394 100644 --- a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c +++ b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c @@ -14,12 +14,12 @@ */
#include <arch/byteorder.h> -#include <console/console.h> #include <fsp/api.h> #include <soc/romstage.h> -#include "spd/spd.h" #include <spd_bin.h>
+#include "spd/spd.h" + void mainboard_memory_init_params(FSPM_UPD *mupd) { } diff --git a/src/mainboard/intel/icelake_rvp/spd/spd_util.c b/src/mainboard/intel/icelake_rvp/spd/spd_util.c index 6b73364..8d7eaf6 100644 --- a/src/mainboard/intel/icelake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/icelake_rvp/spd/spd_util.c @@ -12,12 +12,13 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/byteorder.h> #include <arch/cpu.h> -#include <console/console.h> #include <intelblocks/mp_init.h> #include <stdint.h> #include <string.h> + #include "../board_id.h" #include "spd.h"
diff --git a/src/mainboard/intel/kblrvp/spd/spd_util.c b/src/mainboard/intel/kblrvp/spd/spd_util.c index 12d9d10..1004384 100644 --- a/src/mainboard/intel/kblrvp/spd/spd_util.c +++ b/src/mainboard/intel/kblrvp/spd/spd_util.c @@ -12,12 +12,13 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/byteorder.h> -#include <console/console.h> #include <stdint.h> #include <string.h> #include <soc/pei_data.h> #include <soc/pei_wrapper.h> + #include "../board_id.h" #include "spd.h"
diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c index 2edb7da..1b5d45e 100644 --- a/src/mainboard/kontron/986lcd-m/mptable.c +++ b/src/mainboard/kontron/986lcd-m/mptable.c @@ -15,7 +15,6 @@
#include <device/device.h> #include <device/pci.h> -#include <console/console.h> #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c index cf87d7f..2db0f75 100644 --- a/src/mainboard/roda/rk886ex/mptable.c +++ b/src/mainboard/roda/rk886ex/mptable.c @@ -16,7 +16,6 @@
#include <device/device.h> #include <device/pci.h> -#include <console/console.h> #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> diff --git a/src/mainboard/sifive/hifive-unleashed/mainboard.c b/src/mainboard/sifive/hifive-unleashed/mainboard.c index 2d62cd0..96a2678 100644 --- a/src/mainboard/sifive/hifive-unleashed/mainboard.c +++ b/src/mainboard/sifive/hifive-unleashed/mainboard.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */
-#include <console/console.h> +#include <device/device.h> #include <soc/sdram.h> #include <symbols.h>
diff --git a/src/northbridge/amd/amdht/h3ncmn.h b/src/northbridge/amd/amdht/h3ncmn.h index f4a782d..c007089 100644 --- a/src/northbridge/amd/amdht/h3ncmn.h +++ b/src/northbridge/amd/amdht/h3ncmn.h @@ -19,8 +19,8 @@
#include <inttypes.h> #include <device/pci.h> -#include <console/console.h> #include <cpu/amd/msr.h> + #include "comlib.h" #include "h3finit.h" #include "h3ffeat.h" diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 5d31d44..14da928 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -23,11 +23,11 @@ #define DQS_TRAIN_DEBUG 0
#include <inttypes.h> -#include "mct_d_gcc.h" -#include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> #include <northbridge/amd/amdfam10/raminit.h>
+#include "mct_d_gcc.h" + extern const u8 Table_DQSRcvEn_Offset[]; extern const u32 TestPattern0_D[]; extern const u32 TestPattern1_D[]; diff --git a/src/northbridge/amd/amdmct/mct/mctsrc.c b/src/northbridge/amd/amdmct/mct/mctsrc.c index 4689c7b..649c1c8 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc.c @@ -14,8 +14,10 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> + #include "mct_d.h"
/****************************************************************************** diff --git a/src/northbridge/via/vx900/vx900.h b/src/northbridge/via/vx900/vx900.h index 9e30638..96d821a 100644 --- a/src/northbridge/via/vx900/vx900.h +++ b/src/northbridge/via/vx900/vx900.h @@ -28,7 +28,6 @@
#include <device/pci_ops.h> #include <device/pci.h> -#include <console/console.h>
u32 vx900_get_tolm(void); void vx900_set_chrome9hd_fb_size(u32 size_mb); diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c index ba1433c..4f91b8a 100644 --- a/src/soc/intel/apollolake/memmap.c +++ b/src/soc/intel/apollolake/memmap.c @@ -17,13 +17,15 @@
#include <assert.h> #include <cbmem.h> -#include "chip.h" +#include <console/console.h> #include <device/pci.h> #include <fsp/memmap.h> #include <intelblocks/smm.h> #include <soc/systemagent.h> #include <soc/pci_devs.h>
+#include "chip.h" + void *cbmem_top(void) { const struct device *dev; diff --git a/src/soc/intel/fsp_baytrail/include/soc/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h index 7b3a3c8..f0ae0b3 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/i2c.h +++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h @@ -16,7 +16,6 @@ #ifndef __SOC_INTEL_FSP_BAYTRAIL_I2C_H__ #define __SOC_INTEL_FSP_BAYTRAIL_I2C_H__
-#include <console/console.h> #include <device/pci_def.h> #include <stdlib.h>
diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index 2d35f5b..0940791 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 0e4388e..464c25e 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -14,7 +14,6 @@ */
#include <chip.h> -#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <fsp/api.h> diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c index 8fe0507..3d05824 100644 --- a/src/soc/intel/icelake/lpc.c +++ b/src/soc/intel/icelake/lpc.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <pc80/isa-dma.h> diff --git a/src/soc/intel/icelake/systemagent.c b/src/soc/intel/icelake/systemagent.c index 7903667..930e78e 100644 --- a/src/soc/intel/icelake/systemagent.c +++ b/src/soc/intel/icelake/systemagent.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <intelblocks/systemagent.h> diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c index caf9a03..a167d2b 100644 --- a/src/soc/mediatek/mt8183/auxadc.c +++ b/src/soc/mediatek/mt8183/auxadc.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <assert.h> -#include <console/console.h> #include <delay.h> #include <soc/addressmap.h> #include <soc/auxadc.h> diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c index fe2d673..66c3103 100644 --- a/src/soc/qualcomm/ipq806x/uart.c +++ b/src/soc/qualcomm/ipq806x/uart.c @@ -33,7 +33,6 @@
#include <device/mmio.h> #include <boot/coreboot_tables.h> -#include <console/console.h> #include <console/uart.h> #include <delay.h> #include <gpio.h> diff --git a/src/soc/qualcomm/qcs405/clock.c b/src/soc/qualcomm/qcs405/clock.c index cd7c1f2..369bcdf 100644 --- a/src/soc/qualcomm/qcs405/clock.c +++ b/src/soc/qualcomm/qcs405/clock.c @@ -14,12 +14,10 @@
#include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timestamp.h> #include <commonlib/helpers.h> #include <string.h> - #include <soc/clock.h>
#define DIV(div) (div ? (2*div - 1) : 0) diff --git a/src/soc/qualcomm/qcs405/gpio.c b/src/soc/qualcomm/qcs405/gpio.c index 5904cb3..18aacf4 100644 --- a/src/soc/qualcomm/qcs405/gpio.c +++ b/src/soc/qualcomm/qcs405/gpio.c @@ -15,10 +15,8 @@
#include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timestamp.h> - #include <gpio.h>
void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull, diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c index 382e5a6..addac5e 100644 --- a/src/soc/qualcomm/sdm845/clock.c +++ b/src/soc/qualcomm/sdm845/clock.c @@ -15,7 +15,6 @@
#include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <commonlib/helpers.h> #include <assert.h> #include <soc/clock.h> diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c index 2e6781a..cabb31b 100644 --- a/src/southbridge/amd/amd8111/early_smbus.c +++ b/src/southbridge/amd/amd8111/early_smbus.c @@ -12,7 +12,9 @@ */
#include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> + #include "amd8111_smbus.h"
#define SMBUS_IO_BASE 0x0f00 diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h index 04b8abc..7ea2caa 100644 --- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h @@ -53,7 +53,6 @@ #define IMC_ENABLE_OVER_WRITE 0x01 #endif
-#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include <SB800.h> diff --git a/src/southbridge/amd/cimx/sb900/SbPlatform.h b/src/southbridge/amd/cimx/sb900/SbPlatform.h index 660553f..f5c11d4 100644 --- a/src/southbridge/amd/cimx/sb900/SbPlatform.h +++ b/src/southbridge/amd/cimx/sb900/SbPlatform.h @@ -49,7 +49,6 @@ #endif #define FIXUP_PTR(ptr) ptr
-#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include "Hudson-2.h" diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 6a575e3..eaa47e3 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -17,9 +17,11 @@ #define _SB800_EARLY_SETUP_C_
#include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/common/reset.h> + #include "sb800.h" #include "smbus.c"
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index 1e357df..156c387 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -17,6 +17,7 @@ */
#include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <southbridge/amd/common/reset.h>
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 09414af..908cdd5 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -17,6 +17,7 @@
#include <arch/io.h> #include <delay.h> +#include <console/console.h>
#ifdef UNUSED_CODE int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);
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