Change in ...coreboot[master]: mainboard/google/octopus/variants/casta: Correct unused GPIO pad conf...
Seunghwan Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31135
Change subject: mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration ......................................................................
mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration
Real unused GPIO pad is GPIO_123, but GPIO_122 is configured as unused pad. This patch corrects the configuration.
BUG=NONE BRANCH=octopus TEST=emerge-octopus coreboot
Change-Id: I4473bd66a4162f5aee3b998aacba906824728fc8 Signed-off-by: Seunghwan Kim sh_.kim@samsung.com --- M src/mainboard/google/octopus/variants/casta/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/31135/1
diff --git a/src/mainboard/google/octopus/variants/casta/gpio.c b/src/mainboard/google/octopus/variants/casta/gpio.c index 1746e4f..6d0b20f 100644 --- a/src/mainboard/google/octopus/variants/casta/gpio.c +++ b/src/mainboard/google/octopus/variants/casta/gpio.c @@ -37,7 +37,7 @@ PAD_NC(GPIO_119, UP_20K), /* PCIE_WAKE3_B - only use CNVI */
/* PCIE_CLKREQ3_B -- unused */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_122, UP_20K, DEEP, NF1, HIZCRx1, ENPU), + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_123, UP_20K, DEEP, NF1, HIZCRx1, ENPU),
PAD_NC(GPIO_138, UP_20K), /* PEN_PDCT_ODL -- unused */ PAD_NC(GPIO_139, UP_20K), /* PEN_INT_ODL -- unused */
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31135 )
Change subject: mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31135 )
Change subject: mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Tested how? Any visible effects?
https://review.coreboot.org/#/c/31135/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31135/1//COMMIT_MSG@7 PS1, Line 7: mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration Please use *mb* instead of *mainboard* to make it shorter.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31135 )
Change subject: mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patch Set 1: Code-Review+1
(1 comment)
Tested how? Any visible effects?
Reading register address "0xD0C508E0" using iotools command should produce the following output: 0x40000402
https://review.coreboot.org/#/c/31135/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31135/1//COMMIT_MSG@7 PS1, Line 7: mainboard/google/octopus/variants/casta: Correct unused GPIO pad configuration
Please use *mb* instead of *mainboard* to make it shorter.
Also "variants" can be removed. That will make it shorter i.e. mb/google/octopus/casta: Correct unused GPIO pad configuration
shkim has uploaded a new patch set (#2) to the change originally created by Seunghwan Kim. ( https://review.coreboot.org/c/coreboot/+/31135 )
Change subject: mb/google/octopus/casta: Correct unused GPIO pad configuration ......................................................................
mb/google/octopus/casta: Correct unused GPIO pad configuration
Real unused GPIO pad is GPIO_123, but GPIO_122 is configured as unused pad. This patch corrects the configuration.
BUG=NONE BRANCH=octopus TEST=emerge-octopus coreboot
Change-Id: I4473bd66a4162f5aee3b998aacba906824728fc8 Signed-off-by: Seunghwan Kim sh_.kim@samsung.com --- M src/mainboard/google/octopus/variants/casta/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/31135/2
shkim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31135 )
Change subject: mb/google/octopus/casta: Correct unused GPIO pad configuration ......................................................................
Patch Set 2:
Patch Set 1: Code-Review+2
(1 comment)
Patch Set 1: Code-Review+1
(1 comment)
Tested how? Any visible effects?
Reading register address "0xD0C508E0" using iotools command should produce the following output: 0x40000402
Verified;
iotools mmio_read32 0xd0c508e0
0x40000402
Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31135 )
Change subject: mb/google/octopus/casta: Correct unused GPIO pad configuration ......................................................................
mb/google/octopus/casta: Correct unused GPIO pad configuration
Real unused GPIO pad is GPIO_123, but GPIO_122 is configured as unused pad. This patch corrects the configuration.
BUG=NONE BRANCH=octopus TEST=emerge-octopus coreboot
Change-Id: I4473bd66a4162f5aee3b998aacba906824728fc8 Signed-off-by: Seunghwan Kim sh_.kim@samsung.com Reviewed-on: https://review.coreboot.org/c/31135 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/mainboard/google/octopus/variants/casta/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Furquan Shaikh: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/mainboard/google/octopus/variants/casta/gpio.c b/src/mainboard/google/octopus/variants/casta/gpio.c index fcb7ab5..3a9a441 100644 --- a/src/mainboard/google/octopus/variants/casta/gpio.c +++ b/src/mainboard/google/octopus/variants/casta/gpio.c @@ -37,7 +37,7 @@ PAD_NC(GPIO_119, UP_20K), /* PCIE_WAKE3_B - only use CNVI */
/* PCIE_CLKREQ3_B -- unused */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_122, UP_20K, DEEP, NF1, HIZCRx1, ENPU), + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_123, UP_20K, DEEP, NF1, HIZCRx1, ENPU),
PAD_NC(GPIO_138, UP_20K), /* PEN_PDCT_ODL -- unused */ PAD_NC(GPIO_139, UP_20K), /* PEN_INT_ODL -- unused */
-
Furquan Shaikh (Code Review) -
Karthik Ramasubramanian (Code Review)
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Paul Menzel (Code Review)
-
Seunghwan Kim (Code Review)
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shkim (Code Review)