the following patch was just integrated into master: commit 22d94ba8a2178b587660f75b221ec06dec776c34 Author: Yidi Lin yidi.lin@mediatek.com Date: Mon Dec 28 16:14:42 2015 +0800
google/oak: Configure SPI_LEVEL_ENABLE pin for rev5
Oak introduces a 1.8V to 3.3V level shifter for EC SPI bus after rev5.
BRANCH=none BUG=none TEST=emerge-oak coreboot
Change-Id: I71868b003fc71dee0532033299afc155a9fbec9c Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 030b478fedf046a7b818696779299c591415fcbd Original-Change-Id: Ibff9705832700867279cb1b39b752b8f5f27cf33 Original-Signed-off-by: Yidi Lin yidi.lin@mediatek.com Original-Reviewed-on: https://chromium-review.googlesource.com/320026 Original-Reviewed-by: Julius Werner jwerner@chromium.org Reviewed-on: https://review.coreboot.org/13970 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org
See https://review.coreboot.org/13970 for details.
-gerrit