Change in coreboot[master]: soc/amd/picasso: Update coreboot UPD variable names to include units
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to review the following change.
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 158 insertions(+), 158 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 58e25e6..00e77c0 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -15,22 +15,22 @@ # For the below fields, 0 indicates use SOC default
# PROCHOT_L de-assertion Ramp Time - register "prochot_l_deassertion_ramp_time" = "20" #mS + register "prochot_l_deassertion_ramp_time_mS" = "20"
# Lower die temperature limit - register "thermctl_limit" = "100" #degrees C + register "thermctl_limit_degreeC" = "100"
# FP5 Processor Voltage Supply PSI Currents - register "psi0_current_limit" = "18000" #mA - register "psi0_soc_current_limit" = "12000" #mA - register "vddcr_soc_voltage_margin" = "0" #mV - register "vddcr_vdd_voltage_margin" = "0" #mV + register "psi0_current_limit_mA" = "18000" + register "psi0_soc_current_limit_mA" = "12000" + register "vddcr_soc_voltage_margin" = "0" + register "vddcr_vdd_voltage_margin" = "0"
# VRM Limits - register "vrm_maximum_current_limit" = "0" #mA - register "vrm_soc_maximum_current_limit" = "0" #mA - register "vrm_current_limit" = "0" #mA - register "vrm_soc_current_limit" = "0" #mA + register "vrm_maximum_current_limit_mA" = "0" + register "vrm_soc_maximum_current_limit_mA" = "0" + register "vrm_current_limit_mA" = "0" + register "vrm_soc_current_limit_mA" = "0"
# Misc SMU settings register "sb_tsi_alert_comparator_mode_en" = "0" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 3ab70a2..c1f82a7 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -15,22 +15,22 @@ # For the below fields, 0 indicates use SOC default
# PROCHOT_L de-assertion Ramp Time - register "prochot_l_deassertion_ramp_time" = "20" #mS + register "prochot_l_deassertion_ramp_time_mS" = "20"
# Lower die temperature limit - register "thermctl_limit" = "100" #degrees C + register "thermctl_limit_degreeC" = "100"
# FP5 Processor Voltage Supply PSI Currents - register "psi0_current_limit" = "18000" #mA - register "psi0_soc_current_limit" = "12000" #mA + register "psi0_current_limit_mA" = "18000" + register "psi0_soc_current_limit_mA" = "12000" register "vddcr_soc_voltage_margin" = "0" #mV register "vddcr_vdd_voltage_margin" = "0" #mV
# VRM Limits - register "vrm_maximum_current_limit" = "0" #mA - register "vrm_soc_maximum_current_limit" = "0" #mA - register "vrm_current_limit" = "0" #mA - register "vrm_soc_current_limit" = "0" #mA + register "vrm_maximum_current_limit_mA" = "0" + register "vrm_soc_maximum_current_limit_mA" = "0" + register "vrm_current_limit_mA" = "0" + register "vrm_soc_current_limit_mA" = "0"
# Misc SMU settings register "sb_tsi_alert_comparator_mode_en" = "0" diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 674d557..e7f4d40 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "3"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "20000" #mw - register "fast_ppt_limit" = "24000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "12000" #mw + register "slow_ppt_limit_mW" = "20000" + register "fast_ppt_limit_mW" = "24000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "200" + register "sustained_power_limit_mW" = "12000"
- register "telemetry_vddcr_vdd_slope" = "65599" #mA + register "telemetry_vddcr_vdd_slope_mA" = "65599" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "29788" #mA + register "telemetry_vddcr_soc_slope_mA" = "29788" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/mainboard/google/zork/variants/dalboz/overridetree.cb b/src/mainboard/google/zork/variants/dalboz/overridetree.cb index 1ddb17b..961fc12 100644 --- a/src/mainboard/google/zork/variants/dalboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dalboz/overridetree.cb @@ -9,17 +9,17 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" #mw - register "fast_ppt_limit" = "9000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "2500" #second - register "sustained_power_limit" = "4800" #mw + register "slow_ppt_limit_mw" = "6000" + register "fast_ppt_limit_mw" = "9000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "2500" + register "sustained_power_limit_mW" = "4800"
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope" = "30231" #mA + register "telemetry_vddcr_vdd_slope_mA" = "30231" register "telemetry_vddcr_vdd_offset" = "0-1" - register "telemetry_vddcr_soc_slope" = "22644" #mA + register "telemetry_vddcr_soc_slope_mA" = "22644" register "telemetry_vddcr_soc_offset" = "68"
# I2C2 for touchscreen and trackpad diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index a11fa5e..5aed9d3 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" #mw - register "fast_ppt_limit" = "9000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "2500" #second - register "sustained_power_limit" = "4800" #mw + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "2500" + register "sustained_power_limit_mW" = "4800"
- register "telemetry_vddcr_vdd_slope" = "42465" #mA + register "telemetry_vddcr_vdd_slope_mA" = "42465" register "telemetry_vddcr_vdd_offset" = "69" - register "telemetry_vddcr_soc_slope" = "42667" #mA + register "telemetry_vddcr_soc_slope_mA" = "42667" register "telemetry_vddcr_soc_offset" = "167" # End : OPN Performance Configuration
diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index 5ef2f0a..1846f51 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "20000" #mw - register "fast_ppt_limit" = "24000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "12000" #mw + register "slow_ppt_limit_mW" = "20000" + register "fast_ppt_limit_mW" = "24000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "200" + register "sustained_power_limit_mW" = "12000"
- register "telemetry_vddcr_vdd_slope" = "62413" #mA + register "telemetry_vddcr_vdd_slope_mA" = "62413" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28977" #mA + register "telemetry_vddcr_soc_slope_mA" = "28977" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index 43a9439..78c516f 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -9,24 +9,24 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "20000" #mw - register "fast_ppt_limit" = "24000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "12000" #mw - register "thermctl_limit" = "100" #degrees C + register "slow_ppt_limit_mW" = "20000" + register "fast_ppt_limit_mW" = "24000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "200" + register "sustained_power_limit_mW" = "12000" + register "thermctl_limit_degreeC" = "100"
- register "telemetry_vddcr_vdd_slope" = "78709" #mA + register "telemetry_vddcr_vdd_slope_mA" = "78709" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "29035" #mA + register "telemetry_vddcr_soc_slope_mA" = "29035" register "telemetry_vddcr_soc_offset" = "0"
# Set STAPM confiuration for tablet mode register "dptc_enable" = "1" - register "slow_ppt_limit_tablet_mode" = "20000" #mw - register "fast_ppt_limit_tablet_mode" = "24000" #mw - register "sustained_power_limit_tablet_mode" = "12000" #mw - register "thermctl_limit_tablet_mode" = "70" #degrees C + register "slow_ppt_limit_tablet_mode_mW" = "20000" + register "fast_ppt_limit_tablet_mode_mW" = "24000" + register "sustained_power_limit_tablet_mode_mW" = "12000" + register "thermctl_limit_tablet_mode_degreeC" = "70"
# End : OPN Performance Configuration
diff --git a/src/mainboard/google/zork/variants/trembyle/overridetree.cb b/src/mainboard/google/zork/variants/trembyle/overridetree.cb index f06f03d..d2385c6 100644 --- a/src/mainboard/google/zork/variants/trembyle/overridetree.cb +++ b/src/mainboard/google/zork/variants/trembyle/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "25000" #mw - register "fast_ppt_limit" = "30000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "15000" #mw + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "200" + register "sustained_power_limit_mW" = "15000"
- register "telemetry_vddcr_vdd_slope" = "71222" #mA + register "telemetry_vddcr_vdd_slope_mA" = "71222" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28977" #mA + register "telemetry_vddcr_soc_slope_mA" = "28977" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index a93beb5..fe11a88 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -10,17 +10,17 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" # mW - register "fast_ppt_limit" = "9000" # mW - register "slow_ppt_time_constant" = "5" # second - register "stapm_time_constant" = "1400" # second - register "sustained_power_limit" = "4800" # mW + register "slow_ppt_limit_mW" = "6000" # mW + register "fast_ppt_limit_mW" = "9000" # mW + register "slow_ppt_time_constant_sec" = "5" # second + register "stapm_time_constant_sec" = "1400" # second + register "sustained_power_limit_mW" = "4800" # mW
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope" = "32643" #mA + register "telemetry_vddcr_vdd_slope_mA" = "32643" #mA register "telemetry_vddcr_vdd_offset" = "208" - register "telemetry_vddcr_soc_slope" = "22742" #mA + register "telemetry_vddcr_soc_slope_mA" = "22742" #mA register "telemetry_vddcr_soc_offset" = "-83"
# USB OC pin mapping diff --git a/src/mainboard/google/zork/variants/woomax/overridetree.cb b/src/mainboard/google/zork/variants/woomax/overridetree.cb index 19d66fc..fa8fefc 100644 --- a/src/mainboard/google/zork/variants/woomax/overridetree.cb +++ b/src/mainboard/google/zork/variants/woomax/overridetree.cb @@ -10,15 +10,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "25000" #mw - register "fast_ppt_limit" = "30000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "15000" #mw + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "200" + register "sustained_power_limit_mW" = "15000"
- register "telemetry_vddcr_vdd_slope" = "102586" #mA + register "telemetry_vddcr_vdd_slope_mA" = "102586" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "26967" #mA + register "telemetry_vddcr_soc_slope_mA" = "26967" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 3098a81..1813289 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -102,22 +102,22 @@ uint8_t system_config;
/* STAPM Configuration */ - uint32_t fast_ppt_limit; - uint32_t slow_ppt_limit; - uint32_t slow_ppt_time_constant; - uint32_t stapm_time_constant; - uint32_t sustained_power_limit; + uint32_t fast_ppt_limit_mW; + uint32_t slow_ppt_limit_mW; + uint32_t slow_ppt_time_constant_sec; + uint32_t stapm_time_constant_sec; + uint32_t sustained_power_limit_mW;
/* Enable dptc for tablet mode (0 = disable, 1 = enable) */ uint8_t dptc_enable;
/* STAPM Configuration for tablet mode (need enable dptc_enable first) */ - uint32_t fast_ppt_limit_tablet_mode; - uint32_t slow_ppt_limit_tablet_mode; - uint32_t sustained_power_limit_tablet_mode; + uint32_t fast_ppt_limit_tablet_mode_mW; + uint32_t slow_ppt_limit_tablet_mode_mW; + uint32_t sustained_power_limit_tablet_mode_mW;
/* PROCHOT_L de-assertion Ramp Time */ - uint32_t prochot_l_deassertion_ramp_time; + uint32_t prochot_l_deassertion_ramp_time_mS;
enum { DOWNCORE_AUTO = 0, @@ -128,29 +128,29 @@ uint8_t smt_disable; /* 1=disable SMT, 0=enable SMT */
/* Lower die temperature limit */ - uint32_t thermctl_limit; - uint32_t thermctl_limit_tablet_mode; + uint32_t thermctl_limit_degreeC; + uint32_t thermctl_limit_tablet_mode_degreeC;
/* FP5 Processor Voltage Supply PSI Currents. 0 indicates use SOC default */ - uint32_t psi0_current_limit; - uint32_t psi0_soc_current_limit; + uint32_t psi0_current_limit_mA; + uint32_t psi0_soc_current_limit_mA; uint32_t vddcr_soc_voltage_margin; uint32_t vddcr_vdd_voltage_margin;
/* VRM Limits. 0 indicates use SOC default */ - uint32_t vrm_maximum_current_limit; - uint32_t vrm_soc_maximum_current_limit; - uint32_t vrm_current_limit; - uint32_t vrm_soc_current_limit; + uint32_t vrm_maximum_current_limit_mA; + uint32_t vrm_soc_maximum_current_limit_mA; + uint32_t vrm_current_limit_mA; + uint32_t vrm_soc_current_limit_mA;
/* Misc SMU settings */ uint8_t sb_tsi_alert_comparator_mode_en; uint8_t core_dldo_bypass; uint8_t min_soc_vid_offset; uint8_t aclk_dpm0_freq_400MHz; - uint32_t telemetry_vddcr_vdd_slope; + uint32_t telemetry_vddcr_vdd_slope_mA; uint32_t telemetry_vddcr_vdd_offset; - uint32_t telemetry_vddcr_soc_slope; + uint32_t telemetry_vddcr_soc_slope_mA; uint32_t telemetry_vddcr_soc_offset;
struct { diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index b967431..6da5b0d 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -105,37 +105,37 @@
mcfg->system_config = config->system_config;
- if ((config->slow_ppt_limit) && - (config->fast_ppt_limit) && - (config->slow_ppt_time_constant) && - (config->stapm_time_constant)) { - mcfg->slow_ppt_limit = config->slow_ppt_limit; - mcfg->fast_ppt_limit = config->fast_ppt_limit; - mcfg->slow_ppt_time_constant = config->slow_ppt_time_constant; - mcfg->stapm_time_constant = config->stapm_time_constant; + if ((config->slow_ppt_limit_mW) && + (config->fast_ppt_limit_mW) && + (config->slow_ppt_time_constant_sec) && + (config->stapm_time_constant_sec)) { + mcfg->slow_ppt_limit_mW = config->slow_ppt_limit_mW; + mcfg->fast_ppt_limit_mW = config->fast_ppt_limit_mW; + mcfg->slow_ppt_time_constant_sec = config->slow_ppt_time_constant_sec; + mcfg->stapm_time_constant_sec = config->stapm_time_constant_sec; }
mcfg->ccx_down_core_mode = config->downcore_mode; mcfg->ccx_disable_smt = config->smt_disable;
- mcfg->sustained_power_limit = config->sustained_power_limit; - mcfg->prochot_l_deassertion_ramp_time = config->prochot_l_deassertion_ramp_time; - mcfg->thermctl_limit = config->thermctl_limit; - mcfg->psi0_current_limit = config->psi0_current_limit; - mcfg->psi0_soc_current_limit = config->psi0_soc_current_limit; + mcfg->sustained_power_limit_mW = config->sustained_power_limit_mW; + mcfg->prochot_l_deassertion_ramp_time_mS = config->prochot_l_deassertion_ramp_time_mS; + mcfg->thermctl_limit_degreeC = config->thermctl_limit_degreeC; + mcfg->psi0_current_limit_mA = config->psi0_current_limit_mA; + mcfg->psi0_soc_current_limit_mA = config->psi0_soc_current_limit_mA; mcfg->vddcr_soc_voltage_margin = config->vddcr_soc_voltage_margin; mcfg->vddcr_vdd_voltage_margin = config->vddcr_vdd_voltage_margin; - mcfg->vrm_maximum_current_limit = config->vrm_maximum_current_limit; - mcfg->vrm_soc_maximum_current_limit = config->vrm_soc_maximum_current_limit; - mcfg->vrm_current_limit = config->vrm_current_limit; - mcfg->vrm_soc_current_limit = config->vrm_soc_current_limit; + mcfg->vrm_maximum_current_limit_mA = config->vrm_maximum_current_limit_mA; + mcfg->vrm_soc_maximum_current_limit_mA = config->vrm_soc_maximum_current_limit_mA; + mcfg->vrm_current_limit_mA = config->vrm_current_limit_mA; + mcfg->vrm_soc_current_limit_mA = config->vrm_soc_current_limit_mA; mcfg->sb_tsi_alert_comparator_mode_en = config->sb_tsi_alert_comparator_mode_en; mcfg->core_dldo_bypass = config->core_dldo_bypass; mcfg->min_soc_vid_offset = config->min_soc_vid_offset; mcfg->aclk_dpm0_freq_400MHz = config->aclk_dpm0_freq_400MHz; - mcfg->telemetry_vddcr_vdd_slope = config->telemetry_vddcr_vdd_slope; + mcfg->telemetry_vddcr_vdd_slope_mA = config->telemetry_vddcr_vdd_slope_mA; mcfg->telemetry_vddcr_vdd_offset = config->telemetry_vddcr_vdd_offset; - mcfg->telemetry_vddcr_soc_slope = config->telemetry_vddcr_soc_slope; + mcfg->telemetry_vddcr_soc_slope_mA = config->telemetry_vddcr_soc_slope_mA; mcfg->telemetry_vddcr_soc_offset = config->telemetry_vddcr_soc_offset; mcfg->hd_audio_enable = devtree_hda_dev_enabled(); mcfg->sata_enable = devtree_sata_dev_enabled(); diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 174cddc..72a0974 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -200,15 +200,15 @@ if (!config->dptc_enable) return;
- struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit, - config->sustained_power_limit, - config->fast_ppt_limit, - config->slow_ppt_limit); + struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC, + config->sustained_power_limit_mW, + config->fast_ppt_limit_mW, + config->slow_ppt_limit_mW); struct dptc_input tablet_mode_input = DPTC_INPUTS( - config->thermctl_limit_tablet_mode, - config->sustained_power_limit_tablet_mode, - config->fast_ppt_limit_tablet_mode, - config->slow_ppt_limit_tablet_mode); + config->thermctl_limit_tablet_mode_degreeC, + config->sustained_power_limit_tablet_mode_mW, + config->fast_ppt_limit_tablet_mode_mW, + config->slow_ppt_limit_tablet_mode_mW); /* Scope (_SB) */ acpigen_write_scope("\_SB");
diff --git a/src/vendorcode/amd/fsp/picasso/FspmUpd.h b/src/vendorcode/amd/fsp/picasso/FspmUpd.h index 56e1a5e..57002f0 100644 --- a/src/vendorcode/amd/fsp/picasso/FspmUpd.h +++ b/src/vendorcode/amd/fsp/picasso/FspmUpd.h @@ -18,33 +18,33 @@ /** Offset 0x004C**/ uint32_t serial_port_stride; /** Offset 0x0050**/ uint32_t serial_port_baudrate; /** Offset 0x0054**/ uint32_t serial_port_refclk; - /** Offset 0x0058**/ uint32_t telemetry_vddcr_vdd_slope; - /** Offset 0x005C**/ uint32_t telemetry_vddcr_vdd_slope2; - /** Offset 0x0060**/ uint32_t telemetry_vddcr_vdd_slope3; - /** Offset 0x0064**/ uint32_t telemetry_vddcr_vdd_slope4; - /** Offset 0x0068**/ uint32_t telemetry_vddcr_vdd_slope5; + /** Offset 0x0058**/ uint32_t telemetry_vddcr_vdd_slope_mA; + /** Offset 0x005C**/ uint32_t telemetry_vddcr_vdd_slope2_mA; + /** Offset 0x0060**/ uint32_t telemetry_vddcr_vdd_slope3_mA; + /** Offset 0x0064**/ uint32_t telemetry_vddcr_vdd_slope4_mA; + /** Offset 0x0068**/ uint32_t telemetry_vddcr_vdd_slope5_mA; /** Offset 0x006C**/ uint32_t telemetry_vddcr_vdd_offset; - /** Offset 0x0070**/ uint32_t telemetry_vddcr_soc_slope; + /** Offset 0x0070**/ uint32_t telemetry_vddcr_soc_slope_mA; /** Offset 0x0074**/ uint32_t telemetry_vddcr_soc_offset; /** Offset 0x0078**/ uint8_t aa_mode_en; /** Offset 0x0079**/ uint8_t unused2; /** Offset 0x007A**/ uint8_t unused3; /** Offset 0x007B**/ uint8_t unused4; - /** Offset 0x007C**/ uint32_t fast_ppt_limit; - /** Offset 0x0080**/ uint32_t slow_ppt_limit; - /** Offset 0x0084**/ uint32_t slow_ppt_time_constant; - /** Offset 0x0088**/ uint32_t psi0_current_limit; - /** Offset 0x008C**/ uint32_t psi0_soc_current_limit; - /** Offset 0x0090**/ uint32_t thermctl_limit; - /** Offset 0x0094**/ uint32_t vrm_maximum_current_limit; - /** Offset 0x0098**/ uint32_t vrm_soc_maximum_current_limit; - /** Offset 0x009C**/ uint32_t sustained_power_limit; - /** Offset 0x00A0**/ uint32_t stapm_time_constant; - /** Offset 0x00A4**/ uint32_t prochot_l_deassertion_ramp_time; - /** Offset 0x00A8**/ uint32_t vrm_current_limit; - /** Offset 0x00AC**/ uint32_t vrm_soc_current_limit; - /** Offset 0x00B0**/ uint32_t vddcr_soc_voltage_margin; - /** Offset 0x00B4**/ uint32_t vddcr_vdd_voltage_margin; + /** Offset 0x007C**/ uint32_t fast_ppt_limit_mw; + /** Offset 0x0080**/ uint32_t slow_ppt_limit_mw; + /** Offset 0x0084**/ uint32_t slow_ppt_time_constant_sec; + /** Offset 0x0088**/ uint32_t psi0_current_limit_mA; + /** Offset 0x008C**/ uint32_t psi0_soc_current_limit_mA; + /** Offset 0x0090**/ uint32_t thermctl_limit_degreeC; + /** Offset 0x0094**/ uint32_t vrm_maximum_current_limit_mA; + /** Offset 0x0098**/ uint32_t vrm_soc_maximum_current_limit_mA; + /** Offset 0x009C**/ uint32_t sustained_power_limit_mW; + /** Offset 0x00A0**/ uint32_t stapm_time_constant_sec; + /** Offset 0x00A4**/ uint32_t prochot_l_deassertion_ramp_time_mS; + /** Offset 0x00A8**/ uint32_t vrm_current_limit_mA; + /** Offset 0x00AC**/ uint32_t vrm_soc_current_limit_mA; + /** Offset 0x00B0**/ uint32_t vddcr_soc_voltage_margin_mV; + /** Offset 0x00B4**/ uint32_t vddcr_vdd_voltage_margin_mV; /** Offset 0x00B8**/ uint32_t smu_feature_control_defines; /** Offset 0x00BC**/ uint32_t smu_feature_control_defines_ext; /** Offset 0x00C0**/ uint8_t sb_tsi_alert_comparator_mode_en; diff --git a/util/mainboard/google/dalboz/template/overridetree.cb b/util/mainboard/google/dalboz/template/overridetree.cb index 7645ba3..d870177 100644 --- a/util/mainboard/google/dalboz/template/overridetree.cb +++ b/util/mainboard/google/dalboz/template/overridetree.cb @@ -10,11 +10,11 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" #mw - register "fast_ppt_limit" = "9000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "2500" #second - register "sustained_power_limit" = "4800" #mw + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "2500" + register "sustained_power_limit_mW" = "4800"
# End : OPN Performance Configuration
diff --git a/util/mainboard/google/trembyle/template/overridetree.cb b/util/mainboard/google/trembyle/template/overridetree.cb index d332fce..9788025 100644 --- a/util/mainboard/google/trembyle/template/overridetree.cb +++ b/util/mainboard/google/trembyle/template/overridetree.cb @@ -10,15 +10,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "25000" #mw - register "fast_ppt_limit" = "30000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "15000" #mw + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_sec" = "5" + register "stapm_time_constant_sec" = "200" + register "sustained_power_limit_mW" = "15000"
- register "telemetry_vddcr_vdd_slope" = "71222" #mA + register "telemetry_vddcr_vdd_slope_mA" = "71222" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28977" #mA + register "telemetry_vddcr_soc_slope_mA" = "28977" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration
Hello Zheng Bao,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#2).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/2
Hello build bot (Jenkins), Zheng Bao,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#3).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/3
Hello build bot (Jenkins), Zheng Bao,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#4).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/4
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb:
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... PS4, Line 18: mS The abbreviation for seconds is a lowercase s, so this should be ms.
Hello build bot (Jenkins), Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Nikolai Vyssotski, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#5).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/5
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 5: Code-Review+2
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb:
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... PS4, Line 18: mS
The abbreviation for seconds is a lowercase s, so this should be ms.
Done
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 5:
It looks like this needs to be rebased manually.
Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 5: Code-Review+1
(2 comments)
Some nits: we can remove leftover comments now
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb:
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... PS4, Line 26: register "vddcr_soc_voltage_margin_mV" = "0" #mV : register "vddcr_vdd_voltage_margin_mV" = "0" #mV : #mV is not needed now
https://review.coreboot.org/c/coreboot/+/46840/5/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/vilboz/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46840/5/src/mainboard/google/zork/v... PS5, Line 13: register "slow_ppt_limit_mW" = "6000" # mW we can remove superfluous comments now
Hello build bot (Jenkins), Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Nikolai Vyssotski, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#6).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/6
Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 6:
(2 comments)
Patch Set 5: Code-Review+1
(2 comments)
Some nits: we can remove leftover comments now
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb:
https://review.coreboot.org/c/coreboot/+/46840/4/src/mainboard/google/zork/v... PS4, Line 26: register "vddcr_soc_voltage_margin_mV" = "0" #mV : register "vddcr_vdd_voltage_margin_mV" = "0" #mV :
#mV is not needed now
Done
https://review.coreboot.org/c/coreboot/+/46840/5/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/vilboz/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46840/5/src/mainboard/google/zork/v... PS5, Line 13: register "slow_ppt_limit_mW" = "6000" # mW
we can remove superfluous comments now
Done
Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 6: Code-Review+1
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 6: Code-Review+1
I'd prefer _s instead of _sec for consistency and SI unit reasons
Hello build bot (Jenkins), Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Nikolai Vyssotski, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#7).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ --exclude-dir=build`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/7
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/dalbo... File util/mainboard/google/dalboz/template/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/dalbo... PS7, Line 15: _sec _s
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/tremb... File util/mainboard/google/trembyle/template/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/tremb... PS7, Line 16: _sec same
Hello build bot (Jenkins), Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Nikolai Vyssotski, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46840
to look at the new patch set (#8).
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ \ --exclude-dir=build --exclude-dir=crossgcc`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46840/8
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 8: Code-Review+2
Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 8:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/dalbo... File util/mainboard/google/dalboz/template/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/dalbo... PS7, Line 15: _sec
_s
Done
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/tremb... File util/mainboard/google/trembyle/template/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46840/7/util/mainboard/google/tremb... PS7, Line 16: _sec
same
Done
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
Patch Set 8: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46840 )
Change subject: soc/amd/picasso: Update coreboot UPD variable names to include units ......................................................................
soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.
sed -i "s/<variable>/variable_u/g" `grep variable -rl ./ \ --exclude-dir=build --exclude-dir=crossgcc`
BUG=b:171334623 TEST=Build
Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3 Signed-off-by: Zheng Bao fishbaozi@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46840 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/romstage.c M src/soc/amd/picasso/root_complex.c M src/vendorcode/amd/fsp/picasso/FspmUpd.h M util/mainboard/google/dalboz/template/overridetree.cb M util/mainboard/google/trembyle/template/overridetree.cb 16 files changed, 164 insertions(+), 164 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 58e25e6..9f5ef0c 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -15,22 +15,22 @@ # For the below fields, 0 indicates use SOC default
# PROCHOT_L de-assertion Ramp Time - register "prochot_l_deassertion_ramp_time" = "20" #mS + register "prochot_l_deassertion_ramp_time_ms" = "20"
# Lower die temperature limit - register "thermctl_limit" = "100" #degrees C + register "thermctl_limit_degreeC" = "100"
# FP5 Processor Voltage Supply PSI Currents - register "psi0_current_limit" = "18000" #mA - register "psi0_soc_current_limit" = "12000" #mA - register "vddcr_soc_voltage_margin" = "0" #mV - register "vddcr_vdd_voltage_margin" = "0" #mV + register "psi0_current_limit_mA" = "18000" + register "psi0_soc_current_limit_mA" = "12000" + register "vddcr_soc_voltage_margin_mV" = "0" + register "vddcr_vdd_voltage_margin_mV" = "0"
# VRM Limits - register "vrm_maximum_current_limit" = "0" #mA - register "vrm_soc_maximum_current_limit" = "0" #mA - register "vrm_current_limit" = "0" #mA - register "vrm_soc_current_limit" = "0" #mA + register "vrm_maximum_current_limit_mA" = "0" + register "vrm_soc_maximum_current_limit_mA" = "0" + register "vrm_current_limit_mA" = "0" + register "vrm_soc_current_limit_mA" = "0"
# Misc SMU settings register "sb_tsi_alert_comparator_mode_en" = "0" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 3ab70a2..ffe2b7f 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -15,22 +15,22 @@ # For the below fields, 0 indicates use SOC default
# PROCHOT_L de-assertion Ramp Time - register "prochot_l_deassertion_ramp_time" = "20" #mS + register "prochot_l_deassertion_ramp_time_ms" = "20"
# Lower die temperature limit - register "thermctl_limit" = "100" #degrees C + register "thermctl_limit_degreeC" = "100"
# FP5 Processor Voltage Supply PSI Currents - register "psi0_current_limit" = "18000" #mA - register "psi0_soc_current_limit" = "12000" #mA - register "vddcr_soc_voltage_margin" = "0" #mV - register "vddcr_vdd_voltage_margin" = "0" #mV + register "psi0_current_limit_mA" = "18000" + register "psi0_soc_current_limit_mA" = "12000" + register "vddcr_soc_voltage_margin_mV" = "0" + register "vddcr_vdd_voltage_margin_mV" = "0"
# VRM Limits - register "vrm_maximum_current_limit" = "0" #mA - register "vrm_soc_maximum_current_limit" = "0" #mA - register "vrm_current_limit" = "0" #mA - register "vrm_soc_current_limit" = "0" #mA + register "vrm_maximum_current_limit_mA" = "0" + register "vrm_soc_maximum_current_limit_mA" = "0" + register "vrm_current_limit_mA" = "0" + register "vrm_soc_current_limit_mA" = "0"
# Misc SMU settings register "sb_tsi_alert_comparator_mode_en" = "0" diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index d97a2b5..8f6aff2 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "3"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "20000" #mw - register "fast_ppt_limit" = "24000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "12000" #mw + register "slow_ppt_limit_mW" = "20000" + register "fast_ppt_limit_mW" = "24000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "200" + register "sustained_power_limit_mW" = "12000"
- register "telemetry_vddcr_vdd_slope" = "65599" #mA + register "telemetry_vddcr_vdd_slope_mA" = "65599" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "29788" #mA + register "telemetry_vddcr_soc_slope_mA" = "29788" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/mainboard/google/zork/variants/dalboz/overridetree.cb b/src/mainboard/google/zork/variants/dalboz/overridetree.cb index 1ddb17b..67fa077 100644 --- a/src/mainboard/google/zork/variants/dalboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dalboz/overridetree.cb @@ -9,17 +9,17 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" #mw - register "fast_ppt_limit" = "9000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "2500" #second - register "sustained_power_limit" = "4800" #mw + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "2500" + register "sustained_power_limit_mW" = "4800"
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope" = "30231" #mA + register "telemetry_vddcr_vdd_slope_mA" = "30231" register "telemetry_vddcr_vdd_offset" = "0-1" - register "telemetry_vddcr_soc_slope" = "22644" #mA + register "telemetry_vddcr_soc_slope_mA" = "22644" register "telemetry_vddcr_soc_offset" = "68"
# I2C2 for touchscreen and trackpad diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index a11fa5e..f3be599 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" #mw - register "fast_ppt_limit" = "9000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "2500" #second - register "sustained_power_limit" = "4800" #mw + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "2500" + register "sustained_power_limit_mW" = "4800"
- register "telemetry_vddcr_vdd_slope" = "42465" #mA + register "telemetry_vddcr_vdd_slope_mA" = "42465" register "telemetry_vddcr_vdd_offset" = "69" - register "telemetry_vddcr_soc_slope" = "42667" #mA + register "telemetry_vddcr_soc_slope_mA" = "42667" register "telemetry_vddcr_soc_offset" = "167" # End : OPN Performance Configuration
diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index 5ef2f0a..4fd7e0e 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "20000" #mw - register "fast_ppt_limit" = "24000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "12000" #mw + register "slow_ppt_limit_mW" = "20000" + register "fast_ppt_limit_mW" = "24000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "200" + register "sustained_power_limit_mW" = "12000"
- register "telemetry_vddcr_vdd_slope" = "62413" #mA + register "telemetry_vddcr_vdd_slope_mA" = "62413" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28977" #mA + register "telemetry_vddcr_soc_slope_mA" = "28977" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index e04a62e..4ac5f81 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -9,24 +9,24 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "20000" #mw - register "fast_ppt_limit" = "24000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "12000" #mw - register "thermctl_limit" = "100" #degrees C + register "slow_ppt_limit_mW" = "20000" + register "fast_ppt_limit_mW" = "24000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "200" + register "sustained_power_limit_mW" = "12000" + register "thermctl_limit_degreeC" = "100"
- register "telemetry_vddcr_vdd_slope" = "62641" #mA + register "telemetry_vddcr_vdd_slope_mA" = "62641" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28333" #mA + register "telemetry_vddcr_soc_slope_mA" = "28333" register "telemetry_vddcr_soc_offset" = "0"
# Set STAPM confiuration for tablet mode register "dptc_enable" = "1" - register "slow_ppt_limit_tablet_mode" = "20000" #mw - register "fast_ppt_limit_tablet_mode" = "24000" #mw - register "sustained_power_limit_tablet_mode" = "12000" #mw - register "thermctl_limit_tablet_mode" = "70" #degrees C + register "slow_ppt_limit_tablet_mode_mW" = "20000" + register "fast_ppt_limit_tablet_mode_mW" = "24000" + register "sustained_power_limit_tablet_mode_mW" = "12000" + register "thermctl_limit_tablet_mode_degreeC" = "70"
# End : OPN Performance Configuration
diff --git a/src/mainboard/google/zork/variants/trembyle/overridetree.cb b/src/mainboard/google/zork/variants/trembyle/overridetree.cb index f06f03d..90020ea 100644 --- a/src/mainboard/google/zork/variants/trembyle/overridetree.cb +++ b/src/mainboard/google/zork/variants/trembyle/overridetree.cb @@ -9,15 +9,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "25000" #mw - register "fast_ppt_limit" = "30000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "15000" #mw + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "200" + register "sustained_power_limit_mW" = "15000"
- register "telemetry_vddcr_vdd_slope" = "71222" #mA + register "telemetry_vddcr_vdd_slope_mA" = "71222" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28977" #mA + register "telemetry_vddcr_soc_slope_mA" = "28977" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index bca556c..2f3b4fc 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -10,17 +10,17 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" # mW - register "fast_ppt_limit" = "9000" # mW - register "slow_ppt_time_constant" = "5" # second - register "stapm_time_constant" = "1400" # second - register "sustained_power_limit" = "4800" # mW + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "1400" + register "sustained_power_limit_mW" = "4800"
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope" = "32643" #mA + register "telemetry_vddcr_vdd_slope_mA" = "32643" register "telemetry_vddcr_vdd_offset" = "208" - register "telemetry_vddcr_soc_slope" = "22742" #mA + register "telemetry_vddcr_soc_slope_mA" = "22742" register "telemetry_vddcr_soc_offset" = "-83"
# USB OC pin mapping diff --git a/src/mainboard/google/zork/variants/woomax/overridetree.cb b/src/mainboard/google/zork/variants/woomax/overridetree.cb index e9d66f9..0f0e856 100644 --- a/src/mainboard/google/zork/variants/woomax/overridetree.cb +++ b/src/mainboard/google/zork/variants/woomax/overridetree.cb @@ -10,15 +10,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "25000" #mw - register "fast_ppt_limit" = "30000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "15000" #mw + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "200" + register "sustained_power_limit_mW" = "15000"
- register "telemetry_vddcr_vdd_slope" = "102586" #mA + register "telemetry_vddcr_vdd_slope_mA" = "102586" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "26967" #mA + register "telemetry_vddcr_soc_slope_mA" = "26967" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 3098a81..9d8fb8e 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -102,22 +102,22 @@ uint8_t system_config;
/* STAPM Configuration */ - uint32_t fast_ppt_limit; - uint32_t slow_ppt_limit; - uint32_t slow_ppt_time_constant; - uint32_t stapm_time_constant; - uint32_t sustained_power_limit; + uint32_t fast_ppt_limit_mW; + uint32_t slow_ppt_limit_mW; + uint32_t slow_ppt_time_constant_s; + uint32_t stapm_time_constant_s; + uint32_t sustained_power_limit_mW;
/* Enable dptc for tablet mode (0 = disable, 1 = enable) */ uint8_t dptc_enable;
/* STAPM Configuration for tablet mode (need enable dptc_enable first) */ - uint32_t fast_ppt_limit_tablet_mode; - uint32_t slow_ppt_limit_tablet_mode; - uint32_t sustained_power_limit_tablet_mode; + uint32_t fast_ppt_limit_tablet_mode_mW; + uint32_t slow_ppt_limit_tablet_mode_mW; + uint32_t sustained_power_limit_tablet_mode_mW;
/* PROCHOT_L de-assertion Ramp Time */ - uint32_t prochot_l_deassertion_ramp_time; + uint32_t prochot_l_deassertion_ramp_time_ms;
enum { DOWNCORE_AUTO = 0, @@ -128,29 +128,29 @@ uint8_t smt_disable; /* 1=disable SMT, 0=enable SMT */
/* Lower die temperature limit */ - uint32_t thermctl_limit; - uint32_t thermctl_limit_tablet_mode; + uint32_t thermctl_limit_degreeC; + uint32_t thermctl_limit_tablet_mode_degreeC;
/* FP5 Processor Voltage Supply PSI Currents. 0 indicates use SOC default */ - uint32_t psi0_current_limit; - uint32_t psi0_soc_current_limit; - uint32_t vddcr_soc_voltage_margin; - uint32_t vddcr_vdd_voltage_margin; + uint32_t psi0_current_limit_mA; + uint32_t psi0_soc_current_limit_mA; + uint32_t vddcr_soc_voltage_margin_mV; + uint32_t vddcr_vdd_voltage_margin_mV;
/* VRM Limits. 0 indicates use SOC default */ - uint32_t vrm_maximum_current_limit; - uint32_t vrm_soc_maximum_current_limit; - uint32_t vrm_current_limit; - uint32_t vrm_soc_current_limit; + uint32_t vrm_maximum_current_limit_mA; + uint32_t vrm_soc_maximum_current_limit_mA; + uint32_t vrm_current_limit_mA; + uint32_t vrm_soc_current_limit_mA;
/* Misc SMU settings */ uint8_t sb_tsi_alert_comparator_mode_en; uint8_t core_dldo_bypass; uint8_t min_soc_vid_offset; uint8_t aclk_dpm0_freq_400MHz; - uint32_t telemetry_vddcr_vdd_slope; + uint32_t telemetry_vddcr_vdd_slope_mA; uint32_t telemetry_vddcr_vdd_offset; - uint32_t telemetry_vddcr_soc_slope; + uint32_t telemetry_vddcr_soc_slope_mA; uint32_t telemetry_vddcr_soc_offset;
struct { diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index b967431..9be970d 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -105,37 +105,37 @@
mcfg->system_config = config->system_config;
- if ((config->slow_ppt_limit) && - (config->fast_ppt_limit) && - (config->slow_ppt_time_constant) && - (config->stapm_time_constant)) { - mcfg->slow_ppt_limit = config->slow_ppt_limit; - mcfg->fast_ppt_limit = config->fast_ppt_limit; - mcfg->slow_ppt_time_constant = config->slow_ppt_time_constant; - mcfg->stapm_time_constant = config->stapm_time_constant; + if ((config->slow_ppt_limit_mW) && + (config->fast_ppt_limit_mW) && + (config->slow_ppt_time_constant_s) && + (config->stapm_time_constant_s)) { + mcfg->slow_ppt_limit_mW = config->slow_ppt_limit_mW; + mcfg->fast_ppt_limit_mW = config->fast_ppt_limit_mW; + mcfg->slow_ppt_time_constant_s = config->slow_ppt_time_constant_s; + mcfg->stapm_time_constant_s = config->stapm_time_constant_s; }
mcfg->ccx_down_core_mode = config->downcore_mode; mcfg->ccx_disable_smt = config->smt_disable;
- mcfg->sustained_power_limit = config->sustained_power_limit; - mcfg->prochot_l_deassertion_ramp_time = config->prochot_l_deassertion_ramp_time; - mcfg->thermctl_limit = config->thermctl_limit; - mcfg->psi0_current_limit = config->psi0_current_limit; - mcfg->psi0_soc_current_limit = config->psi0_soc_current_limit; - mcfg->vddcr_soc_voltage_margin = config->vddcr_soc_voltage_margin; - mcfg->vddcr_vdd_voltage_margin = config->vddcr_vdd_voltage_margin; - mcfg->vrm_maximum_current_limit = config->vrm_maximum_current_limit; - mcfg->vrm_soc_maximum_current_limit = config->vrm_soc_maximum_current_limit; - mcfg->vrm_current_limit = config->vrm_current_limit; - mcfg->vrm_soc_current_limit = config->vrm_soc_current_limit; + mcfg->sustained_power_limit_mW = config->sustained_power_limit_mW; + mcfg->prochot_l_deassertion_ramp_time_ms = config->prochot_l_deassertion_ramp_time_ms; + mcfg->thermctl_limit_degreeC = config->thermctl_limit_degreeC; + mcfg->psi0_current_limit_mA = config->psi0_current_limit_mA; + mcfg->psi0_soc_current_limit_mA = config->psi0_soc_current_limit_mA; + mcfg->vddcr_soc_voltage_margin_mV = config->vddcr_soc_voltage_margin_mV; + mcfg->vddcr_vdd_voltage_margin_mV = config->vddcr_vdd_voltage_margin_mV; + mcfg->vrm_maximum_current_limit_mA = config->vrm_maximum_current_limit_mA; + mcfg->vrm_soc_maximum_current_limit_mA = config->vrm_soc_maximum_current_limit_mA; + mcfg->vrm_current_limit_mA = config->vrm_current_limit_mA; + mcfg->vrm_soc_current_limit_mA = config->vrm_soc_current_limit_mA; mcfg->sb_tsi_alert_comparator_mode_en = config->sb_tsi_alert_comparator_mode_en; mcfg->core_dldo_bypass = config->core_dldo_bypass; mcfg->min_soc_vid_offset = config->min_soc_vid_offset; mcfg->aclk_dpm0_freq_400MHz = config->aclk_dpm0_freq_400MHz; - mcfg->telemetry_vddcr_vdd_slope = config->telemetry_vddcr_vdd_slope; + mcfg->telemetry_vddcr_vdd_slope_mA = config->telemetry_vddcr_vdd_slope_mA; mcfg->telemetry_vddcr_vdd_offset = config->telemetry_vddcr_vdd_offset; - mcfg->telemetry_vddcr_soc_slope = config->telemetry_vddcr_soc_slope; + mcfg->telemetry_vddcr_soc_slope_mA = config->telemetry_vddcr_soc_slope_mA; mcfg->telemetry_vddcr_soc_offset = config->telemetry_vddcr_soc_offset; mcfg->hd_audio_enable = devtree_hda_dev_enabled(); mcfg->sata_enable = devtree_sata_dev_enabled(); diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 174cddc..72a0974 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -200,15 +200,15 @@ if (!config->dptc_enable) return;
- struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit, - config->sustained_power_limit, - config->fast_ppt_limit, - config->slow_ppt_limit); + struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC, + config->sustained_power_limit_mW, + config->fast_ppt_limit_mW, + config->slow_ppt_limit_mW); struct dptc_input tablet_mode_input = DPTC_INPUTS( - config->thermctl_limit_tablet_mode, - config->sustained_power_limit_tablet_mode, - config->fast_ppt_limit_tablet_mode, - config->slow_ppt_limit_tablet_mode); + config->thermctl_limit_tablet_mode_degreeC, + config->sustained_power_limit_tablet_mode_mW, + config->fast_ppt_limit_tablet_mode_mW, + config->slow_ppt_limit_tablet_mode_mW); /* Scope (_SB) */ acpigen_write_scope("\_SB");
diff --git a/src/vendorcode/amd/fsp/picasso/FspmUpd.h b/src/vendorcode/amd/fsp/picasso/FspmUpd.h index 56e1a5e..960d0b4 100644 --- a/src/vendorcode/amd/fsp/picasso/FspmUpd.h +++ b/src/vendorcode/amd/fsp/picasso/FspmUpd.h @@ -18,33 +18,33 @@ /** Offset 0x004C**/ uint32_t serial_port_stride; /** Offset 0x0050**/ uint32_t serial_port_baudrate; /** Offset 0x0054**/ uint32_t serial_port_refclk; - /** Offset 0x0058**/ uint32_t telemetry_vddcr_vdd_slope; - /** Offset 0x005C**/ uint32_t telemetry_vddcr_vdd_slope2; - /** Offset 0x0060**/ uint32_t telemetry_vddcr_vdd_slope3; - /** Offset 0x0064**/ uint32_t telemetry_vddcr_vdd_slope4; - /** Offset 0x0068**/ uint32_t telemetry_vddcr_vdd_slope5; + /** Offset 0x0058**/ uint32_t telemetry_vddcr_vdd_slope_mA; + /** Offset 0x005C**/ uint32_t telemetry_vddcr_vdd_slope2_mA; + /** Offset 0x0060**/ uint32_t telemetry_vddcr_vdd_slope3_mA; + /** Offset 0x0064**/ uint32_t telemetry_vddcr_vdd_slope4_mA; + /** Offset 0x0068**/ uint32_t telemetry_vddcr_vdd_slope5_mA; /** Offset 0x006C**/ uint32_t telemetry_vddcr_vdd_offset; - /** Offset 0x0070**/ uint32_t telemetry_vddcr_soc_slope; + /** Offset 0x0070**/ uint32_t telemetry_vddcr_soc_slope_mA; /** Offset 0x0074**/ uint32_t telemetry_vddcr_soc_offset; /** Offset 0x0078**/ uint8_t aa_mode_en; /** Offset 0x0079**/ uint8_t unused2; /** Offset 0x007A**/ uint8_t unused3; /** Offset 0x007B**/ uint8_t unused4; - /** Offset 0x007C**/ uint32_t fast_ppt_limit; - /** Offset 0x0080**/ uint32_t slow_ppt_limit; - /** Offset 0x0084**/ uint32_t slow_ppt_time_constant; - /** Offset 0x0088**/ uint32_t psi0_current_limit; - /** Offset 0x008C**/ uint32_t psi0_soc_current_limit; - /** Offset 0x0090**/ uint32_t thermctl_limit; - /** Offset 0x0094**/ uint32_t vrm_maximum_current_limit; - /** Offset 0x0098**/ uint32_t vrm_soc_maximum_current_limit; - /** Offset 0x009C**/ uint32_t sustained_power_limit; - /** Offset 0x00A0**/ uint32_t stapm_time_constant; - /** Offset 0x00A4**/ uint32_t prochot_l_deassertion_ramp_time; - /** Offset 0x00A8**/ uint32_t vrm_current_limit; - /** Offset 0x00AC**/ uint32_t vrm_soc_current_limit; - /** Offset 0x00B0**/ uint32_t vddcr_soc_voltage_margin; - /** Offset 0x00B4**/ uint32_t vddcr_vdd_voltage_margin; + /** Offset 0x007C**/ uint32_t fast_ppt_limit_mW; + /** Offset 0x0080**/ uint32_t slow_ppt_limit_mW; + /** Offset 0x0084**/ uint32_t slow_ppt_time_constant_s; + /** Offset 0x0088**/ uint32_t psi0_current_limit_mA; + /** Offset 0x008C**/ uint32_t psi0_soc_current_limit_mA; + /** Offset 0x0090**/ uint32_t thermctl_limit_degreeC; + /** Offset 0x0094**/ uint32_t vrm_maximum_current_limit_mA; + /** Offset 0x0098**/ uint32_t vrm_soc_maximum_current_limit_mA; + /** Offset 0x009C**/ uint32_t sustained_power_limit_mW; + /** Offset 0x00A0**/ uint32_t stapm_time_constant_s; + /** Offset 0x00A4**/ uint32_t prochot_l_deassertion_ramp_time_ms; + /** Offset 0x00A8**/ uint32_t vrm_current_limit_mA; + /** Offset 0x00AC**/ uint32_t vrm_soc_current_limit_mA; + /** Offset 0x00B0**/ uint32_t vddcr_soc_voltage_margin_mV; + /** Offset 0x00B4**/ uint32_t vddcr_vdd_voltage_margin_mV; /** Offset 0x00B8**/ uint32_t smu_feature_control_defines; /** Offset 0x00BC**/ uint32_t smu_feature_control_defines_ext; /** Offset 0x00C0**/ uint8_t sb_tsi_alert_comparator_mode_en; diff --git a/util/mainboard/google/dalboz/template/overridetree.cb b/util/mainboard/google/dalboz/template/overridetree.cb index 7645ba3..1cc2364 100644 --- a/util/mainboard/google/dalboz/template/overridetree.cb +++ b/util/mainboard/google/dalboz/template/overridetree.cb @@ -10,11 +10,11 @@ register "system_config" = "1"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "6000" #mw - register "fast_ppt_limit" = "9000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "2500" #second - register "sustained_power_limit" = "4800" #mw + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "2500" + register "sustained_power_limit_mW" = "4800"
# End : OPN Performance Configuration
diff --git a/util/mainboard/google/trembyle/template/overridetree.cb b/util/mainboard/google/trembyle/template/overridetree.cb index d332fce..6f545b2 100644 --- a/util/mainboard/google/trembyle/template/overridetree.cb +++ b/util/mainboard/google/trembyle/template/overridetree.cb @@ -10,15 +10,15 @@ register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect - register "slow_ppt_limit" = "25000" #mw - register "fast_ppt_limit" = "30000" #mw - register "slow_ppt_time_constant" = "5" #second - register "stapm_time_constant" = "200" #second - register "sustained_power_limit" = "15000" #mw + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "200" + register "sustained_power_limit_mW" = "15000"
- register "telemetry_vddcr_vdd_slope" = "71222" #mA + register "telemetry_vddcr_vdd_slope_mA" = "71222" register "telemetry_vddcr_vdd_offset" = "0" - register "telemetry_vddcr_soc_slope" = "28977" #mA + register "telemetry_vddcr_soc_slope_mA" = "28977" register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration
-
Bao Zheng (Code Review) -
Felix Held (Code Review)
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Marshall Dawson (Code Review)
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Martin Roth (Code Review)
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Nikolai Vyssotski (Code Review)