Change in coreboot[master]: cpu/x86/lapic: Avoid aliasing MMIO writes

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55200 )

Change subject: cpu/x86/lapic: Avoid aliasing MMIO writes
......................................................................

cpu/x86/lapic: Avoid aliasing MMIO writes

Change-Id: I75440cb0742eeaa140f49e7e4a4c51a96465441b
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/x86/lapic/lapic.c
M src/include/cpu/x86/lapic.h
2 files changed, 10 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/55200/1

diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index dc61ea7..645bfdc 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -6,6 +6,7 @@
 #include <stdint.h>

int x2apic_mode_enabled;
+uintptr_t lapic_default_base = LAPIC_DEFAULT_BASE;

uintptr_t cpu_get_lapic_addr(void)
 {
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 30c12e8..4c3fe6b 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -10,15 +10,22 @@
 #include <smp/node.h>

extern int x2apic_mode_enabled;
+extern uintptr_t lapic_default_base;
+
+union lapic_registers {
+	uint32_t reg32[0x400 / sizeof(uint32_t)];
+};

static __always_inline uint32_t xapic_read(unsigned int reg)
 {
-	return read32((volatile void *)(uintptr_t)(LAPIC_DEFAULT_BASE + reg));
+	volatile union lapic_registers *xapic_mmio = (void *)lapic_default_base;
+	return xapic_mmio->reg32[reg / sizeof(uint32_t)];
 }

static __always_inline void xapic_write(unsigned int reg, uint32_t v)
 {
-	write32((volatile void *)(uintptr_t)(LAPIC_DEFAULT_BASE + reg), v);
+	volatile union lapic_registers *xapic_mmio = (void *)lapic_default_base;
+	xapic_mmio->reg32[reg / sizeof(uint32_t)] = v;
 }

static __always_inline void xapic_send_ipi(uint32_t icrlow, uint32_t apicid)