[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Elyes Haouas, Felix Singer, Frans Hendriks, Jérémy Compostella, Paul Menzel, Vasiliy Khoruzhick, [e-mail].

Shuo Liu has posted comments on this change by [e-mail]. ( https://review.coreboot.org/c/coreboot/+/83321?usp=email )

Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
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Patch Set 50:

(2 comments)

File src/soc/intel/snowridge/systemagent.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/e01d8097_0b0baed9?usp... :
PS15, Line 12: static void get_pcie_bar(struct device *dev, uint16_t index, uint64_t *base, uint64_t *size)
Maybe to rename as get_pcie_config_bar to be more clear?

https://review.coreboot.org/c/coreboot/+/83321/comment/186d4f90_d5936523?usp... :
PS15, Line 17: 	*size = CONFIG_ECAM_MMCONF_LENGTH;
> The PCIe MMCFG limit register holds a wrong value, so using the Kconfig value as a workaround.

Maybe to add a comment here as a note?