Change in coreboot[master]: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41481 )
Change subject: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax ......................................................................
soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax
This change updates systemagent.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
Change-Id: I479bb6cb7ed4c9265325c7c8621f03454f21f467 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/broadwell/acpi/systemagent.asl 1 file changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/41481/1
diff --git a/src/soc/intel/broadwell/acpi/systemagent.asl b/src/soc/intel/broadwell/acpi/systemagent.asl index c73322f..74a25c1 100644 --- a/src/soc/intel/broadwell/acpi/systemagent.asl +++ b/src/soc/intel/broadwell/acpi/systemagent.asl @@ -147,18 +147,18 @@
// Fix up PCI memory region // Start with Top of Lower Usable DRAM - Store (^MCHC.TLUD, Local0) - Store (^MCHC.MEBA, Local1) + Local0 = ^MCHC.TLUD + Local1 = ^MCHC.MEBA
// Check if ME base is equal - If (LEqual (Local0, Local1)) { + If (Local0 == Local1) { // Use Top Of Memory instead - Store (^MCHC.TOM, Local0) + Local0 = ^MCHC.TOM }
- Store (Local0, PMIN) - Store (Subtract(CONFIG_MMCONF_BASE_ADDRESS, 1), PMAX) - Add(Subtract(PMAX, PMIN), 1, PLEN) + PMIN = Local0 + PMAX = CONFIG_MMCONF_BASE_ADDRESS - 1 + PLEN = (PMAX - PMIN) + 1
Return (MCRS) }
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41481 )
Change subject: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41481 )
Change subject: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Angel Pons, Subrata Banik, Aaron Durbin, Patrick Rudolph, HAOUAS Elyes,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41481
to look at the new patch set (#4).
Change subject: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax ......................................................................
soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax
This change updates systemagent.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
TEST=Verified using --timeless option to abuild that the resulting coreboot.rom is same as without the ASL2.0 syntax changes for auron.
Change-Id: I479bb6cb7ed4c9265325c7c8621f03454f21f467 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/broadwell/acpi/systemagent.asl 1 file changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/41481/4
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41481 )
Change subject: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax ......................................................................
soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax
This change updates systemagent.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
TEST=Verified using --timeless option to abuild that the resulting coreboot.rom is same as without the ASL2.0 syntax changes for auron.
Change-Id: I479bb6cb7ed4c9265325c7c8621f03454f21f467 Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41481 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/acpi/systemagent.asl 1 file changed, 7 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/broadwell/acpi/systemagent.asl b/src/soc/intel/broadwell/acpi/systemagent.asl index c73322f..74a25c1 100644 --- a/src/soc/intel/broadwell/acpi/systemagent.asl +++ b/src/soc/intel/broadwell/acpi/systemagent.asl @@ -147,18 +147,18 @@
// Fix up PCI memory region // Start with Top of Lower Usable DRAM - Store (^MCHC.TLUD, Local0) - Store (^MCHC.MEBA, Local1) + Local0 = ^MCHC.TLUD + Local1 = ^MCHC.MEBA
// Check if ME base is equal - If (LEqual (Local0, Local1)) { + If (Local0 == Local1) { // Use Top Of Memory instead - Store (^MCHC.TOM, Local0) + Local0 = ^MCHC.TOM }
- Store (Local0, PMIN) - Store (Subtract(CONFIG_MMCONF_BASE_ADDRESS, 1), PMAX) - Add(Subtract(PMAX, PMIN), 1, PLEN) + PMIN = Local0 + PMAX = CONFIG_MMCONF_BASE_ADDRESS - 1 + PLEN = (PMAX - PMIN) + 1
Return (MCRS) }
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41481 )
Change subject: soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax ......................................................................
Patch Set 5:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/3606 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3605 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3604 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/3603
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
Angel Pons (Code Review)
-
Furquan Shaikh (Code Review)
-
HAOUAS Elyes (Code Review)