Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41904 )
Change subject: mb/aopen/dxplplusu: Control SMI related FADT entries ......................................................................
mb/aopen/dxplplusu: Control SMI related FADT entries
When no SMI is installed, FADT should not advertise a trigger mechanism that does respond.
Board does not support ACPI S4 or C-states or P-states.
Change-Id: If83efb72e076d404468259e312a5afac625f04af Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/aopen/dxplplusu/fadt.c 1 file changed, 7 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/41904/1
diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/mainboard/aopen/dxplplusu/fadt.c index 36465eb..339c243 100644 --- a/src/mainboard/aopen/dxplplusu/fadt.c +++ b/src/mainboard/aopen/dxplplusu/fadt.c @@ -37,11 +37,13 @@ fadt->preferred_pm_profile = 0; /* PM_MOBILE; */
fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = ACPI_ENABLE; - fadt->acpi_disable = ACPI_DISABLE; - fadt->s4bios_req = S4_BIOS; - fadt->pstate_cnt = PST_CONTROL; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = ACPI_ENABLE; + fadt->acpi_disable = ACPI_DISABLE; + fadt->pstate_cnt = PST_CONTROL; + }
fadt->pm1a_evt_blk = pmbase; fadt->pm1b_evt_blk = 0x0; @@ -60,7 +62,6 @@ fadt->gpe0_blk_len = 8; fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; /* CST_CONTROL; */ fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 85; fadt->flush_size = 1024;
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41904 )
Change subject: mb/aopen/dxplplusu: Control SMI related FADT entries ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41904
to look at the new patch set (#2).
Change subject: mb/aopen/dxplplusu: Control SMI related FADT entries ......................................................................
mb/aopen/dxplplusu: Control SMI related FADT entries
When no SMI is installed, FADT should not advertise a trigger mechanism that does not respond.
Board does not support ACPI S4 or C-states or P-states.
Change-Id: If83efb72e076d404468259e312a5afac625f04af Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/aopen/dxplplusu/fadt.c 1 file changed, 7 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/41904/2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41904 )
Change subject: mb/aopen/dxplplusu: Control SMI related FADT entries ......................................................................
mb/aopen/dxplplusu: Control SMI related FADT entries
When no SMI is installed, FADT should not advertise a trigger mechanism that does not respond.
Board does not support ACPI S4 or C-states or P-states.
Change-Id: If83efb72e076d404468259e312a5afac625f04af Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41904 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/aopen/dxplplusu/fadt.c 1 file changed, 7 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/mainboard/aopen/dxplplusu/fadt.c index 36465eb..339c243 100644 --- a/src/mainboard/aopen/dxplplusu/fadt.c +++ b/src/mainboard/aopen/dxplplusu/fadt.c @@ -37,11 +37,13 @@ fadt->preferred_pm_profile = 0; /* PM_MOBILE; */
fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = ACPI_ENABLE; - fadt->acpi_disable = ACPI_DISABLE; - fadt->s4bios_req = S4_BIOS; - fadt->pstate_cnt = PST_CONTROL; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = ACPI_ENABLE; + fadt->acpi_disable = ACPI_DISABLE; + fadt->pstate_cnt = PST_CONTROL; + }
fadt->pm1a_evt_blk = pmbase; fadt->pm1b_evt_blk = 0x0; @@ -60,7 +62,6 @@ fadt->gpe0_blk_len = 8; fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; /* CST_CONTROL; */ fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 85; fadt->flush_size = 1024;
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41904 )
Change subject: mb/aopen/dxplplusu: Control SMI related FADT entries ......................................................................
Patch Set 4:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4775 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4774 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4773 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4772
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
-
Kyösti Mälkki (Code Review)
-
Patrick Georgi (Code Review)