Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46338 )
Change subject: soc/intel/broadwell/finalize.c: Use register names ......................................................................
soc/intel/broadwell/finalize.c: Use register names
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.
Change-Id: Ida1266f52fcc06577bd876f2cf3e3324ced6ab9d Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/finalize.c 1 file changed, 11 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/46338/1
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index 5601800..5539f61 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -25,17 +25,17 @@ { struct device *host_bridge = pcidev_path_on_root(SA_DEVFN_ROOT);
- pci_or_config16(host_bridge, 0x50, 1 << 0); /* GGC */ - pci_or_config32(host_bridge, 0x5c, 1 << 0); /* DPR */ - pci_or_config32(host_bridge, 0x78, 1 << 10); /* ME */ - pci_or_config32(host_bridge, 0x90, 1 << 0); /* REMAPBASE */ - pci_or_config32(host_bridge, 0x98, 1 << 0); /* REMAPLIMIT */ - pci_or_config32(host_bridge, 0xa0, 1 << 0); /* TOM */ - pci_or_config32(host_bridge, 0xa8, 1 << 0); /* TOUUD */ - pci_or_config32(host_bridge, 0xb0, 1 << 0); /* BDSM */ - pci_or_config32(host_bridge, 0xb4, 1 << 0); /* BGSM */ - pci_or_config32(host_bridge, 0xb8, 1 << 0); /* TSEGMB */ - pci_or_config32(host_bridge, 0xbc, 1 << 0); /* TOLUD */ + pci_or_config16(host_bridge, GGC, 1 << 0); + pci_or_config32(host_bridge, DPR, 1 << 0); + pci_or_config32(host_bridge, MESEG_LIMIT, 1 << 10); + pci_or_config32(host_bridge, REMAPBASE, 1 << 0); + pci_or_config32(host_bridge, REMAPLIMIT, 1 << 0); + pci_or_config32(host_bridge, TOM, 1 << 0); + pci_or_config32(host_bridge, TOUUD, 1 << 0); + pci_or_config32(host_bridge, BDSM, 1 << 0); + pci_or_config32(host_bridge, BGSM, 1 << 0); + pci_or_config32(host_bridge, TSEG, 1 << 0); + pci_or_config32(host_bridge, TOLUD, 1 << 0);
MCHBAR32(MMIO_PAVP_MSG) |= 1 << 0; MCHBAR32(SAPMCTL) |= 1 << 31;
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46338 )
Change subject: soc/intel/broadwell/finalize.c: Use register names ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46338 )
Change subject: soc/intel/broadwell/finalize.c: Use register names ......................................................................
soc/intel/broadwell/finalize.c: Use register names
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.
Change-Id: Ida1266f52fcc06577bd876f2cf3e3324ced6ab9d Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46338 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/broadwell/finalize.c 1 file changed, 11 insertions(+), 11 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index b795f46..af72074 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -27,17 +27,17 @@ { struct device *const host_bridge = pcidev_path_on_root(SA_DEVFN_ROOT);
- pci_or_config16(host_bridge, 0x50, 1 << 0); /* GGC */ - pci_or_config32(host_bridge, 0x5c, 1 << 0); /* DPR */ - pci_or_config32(host_bridge, 0x78, 1 << 10); /* ME */ - pci_or_config32(host_bridge, 0x90, 1 << 0); /* REMAPBASE */ - pci_or_config32(host_bridge, 0x98, 1 << 0); /* REMAPLIMIT */ - pci_or_config32(host_bridge, 0xa0, 1 << 0); /* TOM */ - pci_or_config32(host_bridge, 0xa8, 1 << 0); /* TOUUD */ - pci_or_config32(host_bridge, 0xb0, 1 << 0); /* BDSM */ - pci_or_config32(host_bridge, 0xb4, 1 << 0); /* BGSM */ - pci_or_config32(host_bridge, 0xb8, 1 << 0); /* TSEGMB */ - pci_or_config32(host_bridge, 0xbc, 1 << 0); /* TOLUD */ + pci_or_config16(host_bridge, GGC, 1 << 0); + pci_or_config32(host_bridge, DPR, 1 << 0); + pci_or_config32(host_bridge, MESEG_LIMIT, 1 << 10); + pci_or_config32(host_bridge, REMAPBASE, 1 << 0); + pci_or_config32(host_bridge, REMAPLIMIT, 1 << 0); + pci_or_config32(host_bridge, TOM, 1 << 0); + pci_or_config32(host_bridge, TOUUD, 1 << 0); + pci_or_config32(host_bridge, BDSM, 1 << 0); + pci_or_config32(host_bridge, BGSM, 1 << 0); + pci_or_config32(host_bridge, TSEG, 1 << 0); + pci_or_config32(host_bridge, TOLUD, 1 << 0);
MCHBAR32(0x50fc) |= 0x8f; /* MC */ MCHBAR32(0x5500) |= 1 << 0; /* PAVP */
-
Angel Pons (Code Review) -
Nico Huber (Code Review)