Martin Roth (martinroth@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12468
-gerrit
commit 224ea31f7e415c237319c292213886f0cfbba6d7 Author: Martin Roth martinroth@google.com Date: Wed Nov 18 16:36:40 2015 -0700
fsp1_0: Remove hardcoded microcode locations
These are no longer needed.
Test: Booted minnowmax.
Change-Id: Ie77040f3506464c614760bd4d30280c8113373bd Signed-off-by: Martin Roth martinroth@google.com --- src/cpu/intel/fsp_model_406dx/Kconfig | 5 ----- src/soc/intel/fsp_baytrail/Kconfig | 4 ---- 2 files changed, 9 deletions(-)
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 30e7e59..c36851d 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -53,11 +53,6 @@ config ENABLE_VMX bool "Enable VMX for virtualization" default n
-config CPU_MICROCODE_CBFS_LOC - hex - depends on SUPPORT_CPU_UCODE_IN_CBFS - default 0xfff60040 - config HAVE_CPU_MICROCODE_FILE bool "Add microcode file" help diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index ff23308..2325d75 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -86,10 +86,6 @@ config VGA_BIOS_ID This is the default PCI ID for the Bay Trail graphics devices. This string names the vbios ROM in cbfs.
-config CPU_MICROCODE_CBFS_LOC - hex - default 0xfff10040 - config ENABLE_BUILTIN_COM1 bool "Enable built-in legacy Serial Port" help
-
Martin Roth