New patch to review for coreboot: lars/kunimitsu: Add other sensor in _ART for fan control
Sumeet R Pawnikar (sumeet.r.pawnikar@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17066
-gerrit
commit 0b2dee805348df718398116c579498233bd005fd Author: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Date: Tue Oct 18 10:22:52 2016 +0530
lars/kunimitsu: Add other sensor in _ART for fan control
This patch updates the _ART table with other external sensor TSR0 for Fan speed control on Skylake-U based Kunimitsu and Lars boards.
BUG=chrome-os-partner:51025 BRANCH=firmware-glados-7820.B TEST=Built and booted on kunimitsu and lars EVT boards. Verified this updated _ART table on these boards with different workloads.
Change-Id: Ib195910c5eb00e004e8b9bd50e266ade3c175be2 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://chromium-review.googlesource.com/332349 --- src/mainboard/google/lars/acpi/dptf.asl | 30 +++++++++++++++---------- src/mainboard/intel/kunimitsu/acpi/dptf.asl | 34 ++++++++++++++++++----------- 2 files changed, 40 insertions(+), 24 deletions(-)
diff --git a/src/mainboard/google/lars/acpi/dptf.asl b/src/mainboard/google/lars/acpi/dptf.asl index 7fcf567..b8f0a7a 100644 --- a/src/mainboard/google/lars/acpi/dptf.asl +++ b/src/mainboard/google/lars/acpi/dptf.asl @@ -14,28 +14,32 @@ * GNU General Public License for more details. */
-#define DPTF_CPU_PASSIVE 80 +#define DPTF_CPU_PASSIVE 95 #define DPTF_CPU_CRITICAL 99 #define DPTF_CPU_ACTIVE_AC0 90 -#define DPTF_CPU_ACTIVE_AC1 80 -#define DPTF_CPU_ACTIVE_AC2 70 -#define DPTF_CPU_ACTIVE_AC3 60 -#define DPTF_CPU_ACTIVE_AC4 50 +#define DPTF_CPU_ACTIVE_AC1 77
#define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" -#define DPTF_TSR0_PASSIVE 48 +#define DPTF_TSR0_PASSIVE 65 #define DPTF_TSR0_CRITICAL 70 +#define DPTF_TSR0_ACTIVE_AC0 120 +#define DPTF_TSR0_ACTIVE_AC1 110 +#define DPTF_TSR0_ACTIVE_AC2 47 +#define DPTF_TSR0_ACTIVE_AC3 44 +#define DPTF_TSR0_ACTIVE_AC4 41 +#define DPTF_TSR0_ACTIVE_AC5 38 +#define DPTF_TSR0_ACTIVE_AC6 35
#define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" -#define DPTF_TSR1_PASSIVE 60 -#define DPTF_TSR1_CRITICAL 70 +#define DPTF_TSR1_PASSIVE 63 +#define DPTF_TSR1_CRITICAL 68
#define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" -#define DPTF_TSR2_PASSIVE 55 -#define DPTF_TSR2_CRITICAL 70 +#define DPTF_TSR2_PASSIVE 64 +#define DPTF_TSR2_CRITICAL 69
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL @@ -79,8 +83,12 @@ Name (DART, Package () { * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, * AC7, AC8, AC9 */ - _SB.DPTF.TFN1, _SB.PCI0.B0D4, 100, 100, 90, 80, 70, 60, 0, 0, + _SB.DPTF.TFN1, _SB.PCI0.B0D4, 100, 100, 81, 0, 0, 0, 0, 0, 0, 0, 0 + }, + Package () { + _SB.DPTF.TFN1, _SB.DPTF.TSR0, 100, 100, 81, 68, 56, 48, 40, + 35, 0, 0, 0 } }) #endif diff --git a/src/mainboard/intel/kunimitsu/acpi/dptf.asl b/src/mainboard/intel/kunimitsu/acpi/dptf.asl index e011c97..b2bfe88 100644 --- a/src/mainboard/intel/kunimitsu/acpi/dptf.asl +++ b/src/mainboard/intel/kunimitsu/acpi/dptf.asl @@ -14,28 +14,32 @@ * GNU General Public License for more details. */
-#define DPTF_CPU_PASSIVE 80 -#define DPTF_CPU_CRITICAL 90 -#define DPTF_CPU_ACTIVE_AC0 90 -#define DPTF_CPU_ACTIVE_AC1 80 -#define DPTF_CPU_ACTIVE_AC2 70 -#define DPTF_CPU_ACTIVE_AC3 60 -#define DPTF_CPU_ACTIVE_AC4 50 +#define DPTF_CPU_PASSIVE 95 +#define DPTF_CPU_CRITICAL 99 +#define DPTF_CPU_ACTIVE_AC0 90 +#define DPTF_CPU_ACTIVE_AC1 77
#define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" -#define DPTF_TSR0_PASSIVE 48 +#define DPTF_TSR0_PASSIVE 65 #define DPTF_TSR0_CRITICAL 70 +#define DPTF_TSR0_ACTIVE_AC0 120 +#define DPTF_TSR0_ACTIVE_AC1 110 +#define DPTF_TSR0_ACTIVE_AC2 47 +#define DPTF_TSR0_ACTIVE_AC3 44 +#define DPTF_TSR0_ACTIVE_AC4 41 +#define DPTF_TSR0_ACTIVE_AC5 38 +#define DPTF_TSR0_ACTIVE_AC6 35
#define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" -#define DPTF_TSR1_PASSIVE 60 -#define DPTF_TSR1_CRITICAL 70 +#define DPTF_TSR1_PASSIVE 63 +#define DPTF_TSR1_CRITICAL 68
#define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" -#define DPTF_TSR2_PASSIVE 55 -#define DPTF_TSR2_CRITICAL 70 +#define DPTF_TSR2_PASSIVE 64 +#define DPTF_TSR2_CRITICAL 69
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL @@ -79,8 +83,12 @@ Name (DART, Package () { * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, * AC7, AC8, AC9 */ - _SB.DPTF.TFN1, _SB.PCI0.B0D4, 100, 100, 90, 80, 70, 60, 0, 0, + _SB.DPTF.TFN1, _SB.PCI0.B0D4, 100, 100, 81, 0, 0, 0, 0, 0, 0, 0, 0 + }, + Package () { + _SB.DPTF.TFN1, _SB.DPTF.TSR0, 100, 100, 81, 68, 56, 48, 40, + 35, 0, 0, 0 } }) #endif
-
Sumeet R Pawnikar