Change in coreboot[master]: [WIP]nb/intel/x4x/raminit: Implement read and write DQ DQS t...

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

https://review.coreboot.org/19879

to look at the new patch set (#2).

Change subject: [WIP]nb/intel/x4x/raminit: Implement read and write DQ DQS training
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[WIP]nb/intel/x4x/raminit: Implement read and write DQ DQS training

This is not DDR3 specific.

Change-Id: I806840445b5e768d079910fb9870a2cee7b9f1ca
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/x4x/dq_dqs_dll.c
M src/northbridge/intel/x4x/raminit_ddr23.c
M src/northbridge/intel/x4x/x4x.h
3 files changed, 462 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/19879/2