Patch merged into coreboot/master: northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs

the following patch was just integrated into master:
commit 9597790571ce8d0e86921c3c7d1011fec8ce8a50
Author: Timothy Pearson 
Date:   Tue Oct 20 21:32:09 2015 -0500

northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs

CAR space on certain platforms is nearly full.  This prevents the
    addition of necessary RAM initialization features such as x4 DIMM
    support.  As the DIMM SPD cache uses a sizeable amount of CAR RAM,
    reducing it would free up a significant amount of CAR RAM.

DDR3-based AMD platforms only support up to 3 physical DIMMs on
    each channel (6 per node).  Reduce the maximum number of DIMMs
    on a node from 8 to 6 accordingly.

Change-Id: I38def86da76fc622785318c825670209b2ac9017
    Signed-off-by: Timothy Pearson 
    Reviewed-on: http://review.coreboot.org/12107
    Tested-by: Raptor Engineering Automated Test Stand 
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer

See http://review.coreboot.org/12107 for details.

-gerrit