[S] Change in coreboot[main]: mb/google/stout: Drop GNVS XHCI property

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78435?usp=email )

Change subject: mb/google/stout: Drop GNVS XHCI property
......................................................................

mb/google/stout: Drop GNVS XHCI property

Assume that the	google/stdout bootloader does not touch GNVS.

The only board making use of the xhci property in GNVS is google/stout.
Hardcode it to 'auto' in C and ASL and get rid of the now unused xhci
property in GNVS table.

Change-Id: Ia87defefe9a7d4254aa24851105cee27d4b3329f
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/google/stout/acpi/mainboard.asl
M src/mainboard/google/stout/acpi_tables.c
M src/mainboard/google/stout/smihandler.c
M src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
M src/southbridge/intel/bd82x6x/include/soc/nvs.h
5 files changed, 4 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/78435/1

diff --git a/src/mainboard/google/stout/acpi/mainboard.asl b/src/mainboard/google/stout/acpi/mainboard.asl
index bf9a7e6..a4c36a29 100644
--- a/src/mainboard/google/stout/acpi/mainboard.asl
+++ b/src/mainboard/google/stout/acpi/mainboard.asl
@@ -37,13 +37,8 @@
    			CDW1 |= 8
    		}

-			// Set failure if xHCI is disabled by coreboot
-			If(XHCI == 0) {
-				CDW1 |= 2
-			}
-
-			// Query flag clear and xHCI in auto mode
-			If(!(CDW1 & 0x1) && (XHCI == 2 || XHCI  == 3)) {
+			// Query flag clear
+			If(!(CDW1 & 0x1)) {
    			Printf ("XHCI Switch")
    			Local0 = 0
    			Local0 = XPRT & 0x03
diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c
index 7e6d69c..e8fefa8 100644
--- a/src/mainboard/google/stout/acpi_tables.c
+++ b/src/mainboard/google/stout/acpi_tables.c
@@ -16,7 +16,4 @@

// the lid is open by default.
    gnvs->lids = 1;
-
-	/* XHCI Mode */
-	gnvs->xhci = XHCI_MODE;
 }
diff --git a/src/mainboard/google/stout/smihandler.c b/src/mainboard/google/stout/smihandler.c
index b77c73b..7463ead 100644
--- a/src/mainboard/google/stout/smihandler.c
+++ b/src/mainboard/google/stout/smihandler.c
@@ -62,9 +62,7 @@
    	 * the XHCI PME to prevent wake when the port power is cut
    	 * after the transition into suspend.
    	 */
-		if (gnvs->xhci) {
-			pci_update_config32(PCH_XHCI_DEV, 0x74, ~(1 << 8), 1 << 15);
-		}
+		pci_update_config32(PCH_XHCI_DEV, 0x74, ~(1 << 8), 1 << 15);
    }

ec_kbc_write_cmd(EC_KBD_CMD_MUTE);
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index bf9df69..f2c4166 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -94,9 +94,7 @@
    GTF2,	56,	// 0xa4 - GTF task file buffer for port 2
    IDEM,	 8,	// 0xab - IDE mode (compatible / enhanced)
    IDET,	 8,	// 0xac - IDE
-	/* XHCI */
    Offset (0xb2),
-	XHCI,	 8,

PM1I,	32,	// System Wake Source - PM1 Index
    GPEI,	32,	// GPE Wake Source
diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h
index 86a8b10..eb73185 100644
--- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h
+++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h
@@ -94,9 +94,7 @@
    u8	gtf2[7];
    u8	idem;
    u8	idet;
-	u8	rsvd11[6];
-	/* XHCI */
-	u8	xhci;
+	u8	rsvd11[7];

/* Required for future unified acpi_save_wake_source. */
    u32	pm1i;