[XS] Change in coreboot[main]: mb/{bd/bd_egs, iventec/transformers}: Fix building with x86_64

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81559?usp=email )

Change subject: mb/{bd/bd_egs, iventec/transformers}: Fix building with x86_64
......................................................................

mb/{bd/bd_egs, iventec/transformers}: Fix building with x86_64

This fixes a warning about casting an integer to a pointer, where the
integer has a different size than the pointer (UINT32).

Change-Id: Iceb7cb1dbdc6f5397823a1737e3baeac96966a78
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81559
Reviewed-by: Lean Sheng Tan 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/bytedance/bd_egs/romstage.c
M src/mainboard/inventec/transformers/romstage.c
2 files changed, 4 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Lean Sheng Tan: Looks good to me, approved

diff --git a/src/mainboard/bytedance/bd_egs/romstage.c b/src/mainboard/bytedance/bd_egs/romstage.c
index e010867..f33e74e 100644
--- a/src/mainboard/bytedance/bd_egs/romstage.c
+++ b/src/mainboard/bytedance/bd_egs/romstage.c
@@ -5,13 +5,14 @@
 #include <defs_cxl.h>
 #include <defs_iio.h>
 #include <sprsp_bd_iio.h>
+#include <stdint.h>

static void mainboard_config_iio(FSPM_UPD *mupd)
 {
    int port;

UPD_IIO_PCIE_PORT_CONFIG *PciePortConfig =
-		(UPD_IIO_PCIE_PORT_CONFIG *)mupd->FspmConfig.IioPcieConfigTablePtr;
+		(UPD_IIO_PCIE_PORT_CONFIG *)(uintptr_t)mupd->FspmConfig.IioPcieConfigTablePtr;

/* Socket0: Array bd_iio_pci_port_skt0 only configures DMI, IOU0 ~ IOU4, the rest will be left zero */
    for (port = 0; port < ARRAY_SIZE(bd_iio_pci_port_skt0); port++) {
diff --git a/src/mainboard/inventec/transformers/romstage.c b/src/mainboard/inventec/transformers/romstage.c
index c04720a..9299c7d 100644
--- a/src/mainboard/inventec/transformers/romstage.c
+++ b/src/mainboard/inventec/transformers/romstage.c
@@ -10,6 +10,7 @@
 #include <defs_cxl.h>
 #include <defs_iio.h>
 #include <sprsp_ac_iio.h>
+#include <stdint.h>

#include "ipmi.h"

@@ -24,7 +25,7 @@
    int port;

UPD_IIO_PCIE_PORT_CONFIG *PciePortConfig =
-		(UPD_IIO_PCIE_PORT_CONFIG *)mupd->FspmConfig.IioPcieConfigTablePtr;
+		(UPD_IIO_PCIE_PORT_CONFIG *)(uintptr_t)mupd->FspmConfig.IioPcieConfigTablePtr;

/* Socket0: Array ac_iio_pci_port_skt0 only configures DMI, IOU0 ~ IOU4, the rest will be left zero */
    for (port = 0; port < ARRAY_SIZE(ac_iio_pci_port_skt0); port++) {