Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43688 )
Change subject: sb/intel/*: Delete invalid comment ......................................................................
sb/intel/*: Delete invalid comment
Looks like these comments were moved without checking them. They are no longer correct nor useful, so kill them with fire.
Change-Id: I3de04b8c03f7c511376dec922a60958ffc3bf6a3 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/i82801gx/early_init.c M src/southbridge/intel/lynxpoint/early_pch.c 2 files changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/43688/1
diff --git a/src/southbridge/intel/i82801gx/early_init.c b/src/southbridge/intel/i82801gx/early_init.c index a913873..ef48ed8 100644 --- a/src/southbridge/intel/i82801gx/early_init.c +++ b/src/southbridge/intel/i82801gx/early_init.c @@ -66,7 +66,6 @@
enable_smbus();
- /* Setting up Southbridge. In the northbridge code. */ printk(BIOS_DEBUG, "Setting up static southbridge registers..."); i82801gx_setup_bars();
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 80b8939..e74fdc5 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -41,7 +41,6 @@
static void pch_enable_bars(void) { - /* Setting up Southbridge. In the northbridge code. */ pci_write_config32(PCH_LPC_DEV, RCBA, (uintptr_t)DEFAULT_RCBA | 1);
pci_write_config32(PCH_LPC_DEV, PMBASE, DEFAULT_PMBASE | 1);
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43688 )
Change subject: sb/intel/*: Delete invalid comment ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43688 )
Change subject: sb/intel/*: Delete invalid comment ......................................................................
sb/intel/*: Delete invalid comment
Looks like these comments were moved without checking them. They are no longer correct nor useful, so kill them with fire.
Change-Id: I3de04b8c03f7c511376dec922a60958ffc3bf6a3 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43688 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/southbridge/intel/i82801gx/early_init.c M src/southbridge/intel/lynxpoint/early_pch.c 2 files changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/southbridge/intel/i82801gx/early_init.c b/src/southbridge/intel/i82801gx/early_init.c index a913873..ef48ed8 100644 --- a/src/southbridge/intel/i82801gx/early_init.c +++ b/src/southbridge/intel/i82801gx/early_init.c @@ -66,7 +66,6 @@
enable_smbus();
- /* Setting up Southbridge. In the northbridge code. */ printk(BIOS_DEBUG, "Setting up static southbridge registers..."); i82801gx_setup_bars();
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 80b8939..e74fdc5 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -41,7 +41,6 @@
static void pch_enable_bars(void) { - /* Setting up Southbridge. In the northbridge code. */ pci_write_config32(PCH_LPC_DEV, RCBA, (uintptr_t)DEFAULT_RCBA | 1);
pci_write_config32(PCH_LPC_DEV, PMBASE, DEFAULT_PMBASE | 1);
-
Angel Pons (Code Review) -
Patrick Rudolph (Code Review)