the following patch was just integrated into master: commit 6a4d6825acf324c02198fa73838c1eeaf4fdffc7 Author: Tobias Diedrich ranma+coreboot@tdiedrich.de Date: Sun Jun 21 18:25:38 2015 +0200
amd/family14: Add k10temp thermal zone.
The thermal sensor interface exposed in function 3 of the northbridge is a more convenient and faster way to access the processor-internal thermal sensor than using the SMBus/SB-TSI interface from the FCH, see the Family14 BKDG: "Tctl is a processor temperature control value used for processor thermal management. Tctl is accessible through SB-TSI and D18F3xA4[CurTmp]. Tctl is a temperature on its own scale aligned to the processors cooling requirements"
Also on at least some of these boards the existing thermal zone is broken and always returns 40C (the default value if the SMBus read failed) because the SMBus muxing register (SmBus0Sel) is not set up correctly.
Case in point: The fallback "smbus read failed" temperature is 40 C and the the logs taken from the board status repository for the Asrock E350M1 board all show: "ACPI: Thermal Zone [TZ00] (40 C)" e.g. http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/... and http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/... and http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/...
Example lm-sensors output with this patch on the pcengines APU1, on Linux 4.1.0-rc8+ (wiht both CONFIG_ACPI_THERMAL and CONFIG_SENSORS_K10TEMP enabled):
acpitz-virtual-0 Adapter: Virtual device temp1: +54.0 C (crit = +100.0 C)
k10temp-pci-00c3 Adapter: PCI adapter temp1: +54.0 C (high = +70.0 C) (crit = +100.0 C, hyst = +97.0 C)
Change-Id: Id9c5b783ba424246816677099ec6651814e59f21 Signed-off-by: Tobias Diedrich ranma+coreboot@tdiedrich.de Reviewed-on: http://review.coreboot.org/10940 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Patrick Georgi pgeorgi@google.com
See http://review.coreboot.org/10940 for details.
-gerrit