[XS] Change in coreboot[main]: mb/google/brox: Enable PMC pins to work with PD

[Varshit Pandya (Code Review)]

Attention is currently required from: Ashish Kumar Mishra, Deepti Deshatty, Shelley Chen, Vijay P Hiremath.

Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81207?usp=email )

Change subject: mb/google/brox: Enable PMC pins to work with PD
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/81207/comment/6431911f_76e46687 :
PS1, Line 9: For PMC-PD communication we need to enable 3 pins.
> These pins are configured based on HW team's brox sheet.

this information for SoC (about native function) is captured in it's datasheet (EDS in your case), there should be a table called "pin mux" or something similar in the datasheet which should have info on all the native functions of all GPIO. It would be good if you could mention Doc Number and revision of the EDS which has this info about native function in commit msg.