[S] Change in coreboot[master]: soc/intel/cmd/block/cse: Add config option for storing fw version info

[Dinesh Gehlot (Code Review)]

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74255 )

Change subject: soc/intel/cmd/block/cse: Add config option for storing fw version info
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soc/intel/cmd/block/cse: Add config option for storing fw version info

This patch adds a configuration option, `CONFIG_CSE_FIRMWARE_VERSION',
which enables the storage of firmware version information in CBMEM
memory. This information can be used to identify the firmware version
that is currently installed on the system. The option depends on the
`DRIVERS_INTEL_ISH` option.

BUG=b:273661726
Test=None

Signed-off-by: Dinesh Gehlot 
Change-Id: I78fef45fd2940536b3e91cfd4d184b7635238499
---
M src/soc/intel/common/block/cse/Kconfig
1 file changed, 27 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/74255/1

diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index f1f53d6..8a2b37a 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -45,6 +45,14 @@
      Use this config for SoC platform prior to CNL PCH (with postboot_sai implemented)
      to make `HECI1` device disable using private configuration register (PCR) write.

+config SOC_INTEL_FIRMWARE_VERSION_STORAGE
+	bool
+	depends on DRIVERS_INTEL_ISH
+	help
+	  This configuration option enables the storage of firmware version information in
+	  CBMEM memory.This information can be used to identify the currently running firmware
+	  partition version.
+
 config SOC_INTEL_CSE_SEND_EOP_EARLY
    bool "CSE send EOP early"
    depends on SOC_INTEL_COMMON_BLOCK_CSE