[XS] Change in coreboot[main]: soc/intel/pantherlake: Remove unnecessary cep_enable SoC chip field

[Jérémy Compostella (Code Review)]

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85452?usp=email )

Change subject: soc/intel/pantherlake: Remove unnecessary cep_enable SoC chip field
......................................................................

soc/intel/pantherlake: Remove unnecessary cep_enable SoC chip field

The cep_enable was used on previous platforms to fill the CepEnable
UPD, which is not available on Panther Lake because the Current
Excursion Protection no longer exists.

BUG=b:357011633
TEST=fatcat board build successfully

Change-Id: I42d8c793ac3f33eca212320605b16f3b92c60b9c
Signed-off-by: Jeremy Compostella 
---
M src/soc/intel/pantherlake/chip.h
1 file changed, 0 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/85452/1

diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h
index 5846037..59653bd 100644
--- a/src/soc/intel/pantherlake/chip.h
+++ b/src/soc/intel/pantherlake/chip.h
@@ -295,12 +295,6 @@
    bool enable_fast_vmode[NUM_VR_DOMAINS];

/*
-	 * Current Excursion Protection needs to be set for each VR domain
-	 * in order to be able to enable fast Vmode.
-	 */
-	bool cep_enable[NUM_VR_DOMAINS];
-
-	/*
     * VR Fast Vmode I_TRIP threshold.
     * 0-255A in 1/4 A units. Example: 400 = 100A
     * This setting overrides the default value set by FSPs when Fast VMode