New patch to review for coreboot: mainboard/google/snappy: disable unused devices

[Wisley Chen]

Wisley Chen ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18140

-gerrit

commit c6d7c37c5ba69da8795f14c8a31a8a8aa0701a86
Author: Wisley Chen 
Date:   Sat Jan 14 23:19:16 2017 +0800

mainboard/google/snappy: disable unused devices

The following devices i2c6, i2c7, spi1, spi2, uart3 are not used.

BUG=none
    BRANCH=master
    TEST=emerge-snappy coreboot chromeos-bootimage

Change-Id: I9bacdbdd194ce21686c1618494d113402f2bef6c
    Signed-off-by: Wisley Chen 
---
 src/mainboard/google/reef/variants/snappy/devicetree.cb | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb
index e46483e..d420481 100644
--- a/src/mainboard/google/reef/variants/snappy/devicetree.cb
+++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb
@@ -200,15 +200,15 @@ chip soc/intel/apollolake
    			device i2c 0x9 on end
    		end
    	end	# - I2C 5
-		device pci 17.2 on  end	# - I2C 6
-		device pci 17.3 on  end	# - I2C 7
+		device pci 17.2 off end	# - I2C 6
+		device pci 17.3 off end	# - I2C 7
    	device pci 18.0 on  end	# - UART 0
    	device pci 18.1 on  end	# - UART 1
    	device pci 18.2 on  end	# - UART 2
-		device pci 18.3 on  end	# - UART 3
+		device pci 18.3 off end	# - UART 3
    	device pci 19.0 on  end	# - SPI 0
-		device pci 19.1 on  end	# - SPI 1
-		device pci 19.2 on  end	# - SPI 2
+		device pci 19.1 off end	# - SPI 1
+		device pci 19.2 off end	# - SPI 2
    	device pci 1a.0 on  end	# - PWM
    	device pci 1b.0 on  end	# - SDCARD
    	device pci 1c.0 on  end	# - eMMC