Change in coreboot[master]: soc/intel/elkhartlake/systemagent: possibility of deactivate RAPL

[Werner Zeh (Code Review)]

Attention is currently required from: Uwe Poeche.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63547 )

Change subject: soc/intel/elkhartlake/systemagent: possibility of deactivate RAPL
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Patch Set 2:

(7 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/63547/comment/bee6183d_2320e40f 
PS2, Line 7: soc/intel/elkhartlake/systemagent: possibility of deactivate RAPL
soc/intel/elkhartlake: Disable RAPL based on Kconfig

https://review.coreboot.org/c/coreboot/+/63547/comment/6404fa63_e8bc4cb4 
PS2, Line 9: deactivate
disable

https://review.coreboot.org/c/coreboot/+/63547/comment/f9338ba6_e417c565 
PS2, Line 10: as in APL based boards
SOC_INTEL_DISABLE_POWER_LIMITS

https://review.coreboot.org/c/coreboot/+/63547/comment/65e87c74_680f5cb9 
PS2, Line 10: The only
            : difference in EHL is the necessary usage of an MCHBAR register instead
            : the relevant MSR (Intel changes EDS at the moment).
Other than on previouse SOCs this needs to be done in an MCHBAR mapped register rather than via MSR on Elkhart Lake.

https://review.coreboot.org/c/coreboot/+/63547/comment/14f2a443_d5721fb5 
PS2, Line 15: On siemens/mc_ehl1 checking the MCHBAR register with and without the
            : relevant config switch.
Check MCHBAR mapped registers (MCH_PKG_POWER_LIMIT) on mc_ehl1.

File src/soc/intel/elkhartlake/systemagent.c:

https://review.coreboot.org/c/coreboot/+/63547/comment/08c84c31_e6cbc9c9 
PS2, Line 51: u32
elkhartlake code usually uses uint{8,16,32}_t types. I would do it here, too to stay consistent.

https://review.coreboot.org/c/coreboot/+/63547/comment/940d4ea9_71b5b34f 
PS2, Line 61: Skip setting RAPL per configuration\n
Here you actually disable RAPL directly, so maybe "Disable RAPL" would be more clear here?