Marc Jones has submitted this change and it was merged. ( https://review.coreboot.org/26698 )
Change subject: soc/amd/stoneyridge: Add ACPI device name lookup ......................................................................
soc/amd/stoneyridge: Add ACPI device name lookup
Add the ACPI devices defined in ASL to the soc_acpi_name() lookup function.
BUG=b:80280671 TEST=Add ACPI method to specific GPP bridge. Boot and verify method with ACPI dump.
Change-Id: I5117e0d39db831364173c9c61ccdab6e34f18c59 Signed-off-by: Marc Jones marc.jones@scarletltd.com Signed-off-by: Marc Jones marcj303@gmail.com Reviewed-on: https://review.coreboot.org/26698 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: Kevin Chiu Kevin.Chiu@quantatw.com Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/stoneyridge/chip.c 1 file changed, 12 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Marshall Dawson: Looks good to me, approved Kevin Chiu: Looks good to me, but someone else must approve
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 3b73a05..9ca2db7 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -82,6 +82,18 @@ return NULL;
switch (dev->path.pci.devfn) { + case PCIE0_DEVFN: + return "PBR4"; + case PCIE1_DEVFN: + return "PBR5"; + case PCIE2_DEVFN: + return "PBR6"; + case PCIE3_DEVFN: + return "PBR7"; + case PCIE4_DEVFN: + return "PBR8"; + case HDA1_DEVFN: + return "AZHD"; case EHCI1_DEVFN: return "EHC0"; case LPC_DEVFN: